Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Yidi Lin | 7c06dd9 | 2021-04-08 09:55:11 +0800 | [diff] [blame] | 3 | #include <bl31.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 4 | #include <bootmode.h> |
| 5 | #include <console/console.h> |
| 6 | #include <delay.h> |
| 7 | #include <device/device.h> |
| 8 | #include <device/mmio.h> |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 9 | #include <edid.h> |
| 10 | #include <framebuffer_info.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 11 | #include <gpio.h> |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 12 | #include <soc/ddp.h> |
Ryan Chuang | da63f09 | 2021-06-23 09:47:37 +0800 | [diff] [blame] | 13 | #include <soc/dpm.h> |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 14 | #include <soc/dptx.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 15 | #include <soc/gpio.h> |
| 16 | #include <soc/i2c.h> |
Wenbin Mei | ca33b74a | 2021-08-04 10:53:27 +0800 | [diff] [blame] | 17 | #include <soc/msdc.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 18 | #include <soc/mt6360.h> |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 19 | #include <soc/mtcmos.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 20 | #include <soc/regulator.h> |
Rex-BC Chen | 9e3e0f5 | 2021-06-03 11:41:07 +0800 | [diff] [blame] | 21 | #include <soc/spm.h> |
Yuchen Huang | 144237f | 2021-03-01 14:39:33 +0800 | [diff] [blame] | 22 | #include <soc/usb.h> |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 23 | |
Yidi Lin | 7c06dd9 | 2021-04-08 09:55:11 +0800 | [diff] [blame] | 24 | #include "gpio.h" |
| 25 | |
| 26 | #include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h> |
| 27 | |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 28 | /* GPIO to schematics names */ |
| 29 | #define GPIO_AP_EDP_BKLTEN GPIO(DGI_D5) |
| 30 | #define GPIO_BL_PWM_1V8 GPIO(DISP_PWM0) |
| 31 | #define GPIO_EDP_HPD_1V8 GPIO(GPIO_07) |
| 32 | #define GPIO_EN_PP3300_DISP_X GPIO(I2SO1_D2) |
| 33 | |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 34 | DEFINE_BITFIELD(MSDC0_DRV, 29, 0) |
| 35 | DEFINE_BITFIELD(MSDC1_DRV, 17, 0) |
| 36 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 26, 24) |
| 37 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_1, 30, 28) |
| 38 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_0, 2, 0) |
| 39 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_1, 6, 4) |
| 40 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_2, 10, 8) |
| 41 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_3, 14, 12) |
| 42 | |
Wenbin Mei | ca33b74a | 2021-08-04 10:53:27 +0800 | [diff] [blame] | 43 | #define MSDC0_BASE 0x11230000 |
| 44 | #define MSDC0_TOP_BASE 0x11f50000 |
| 45 | |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 46 | #define MSDC0_DRV_VALUE 0x1b6db6db |
| 47 | #define MSDC1_DRV_VALUE 0x1b6db |
| 48 | #define MSDC1_GPIO_MODE0_VALUE 0x1 |
| 49 | #define MSDC1_GPIO_MODE1_VALUE 0x1 |
| 50 | |
| 51 | enum { |
| 52 | MSDC1_GPIO_MODE0_BASE = 0x100053d0, |
| 53 | MSDC1_GPIO_MODE1_BASE = 0x100053e0, |
| 54 | }; |
| 55 | |
Yidi Lin | 7c06dd9 | 2021-04-08 09:55:11 +0800 | [diff] [blame] | 56 | static void register_reset_to_bl31(void) |
| 57 | { |
| 58 | static struct bl_aux_param_gpio param_reset = { |
| 59 | .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO }, |
| 60 | .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, |
| 61 | }; |
| 62 | |
| 63 | param_reset.gpio.index = GPIO_RESET.id; |
| 64 | register_bl31_aux_param(¶m_reset.h); |
| 65 | } |
| 66 | |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 67 | static void configure_emmc(void) |
| 68 | { |
| 69 | void *gpio_base = (void *)IOCFG_TL_BASE; |
| 70 | int i; |
| 71 | |
| 72 | const gpio_t emmc_pu_pin[] = { |
| 73 | GPIO(EMMC_DAT0), GPIO(EMMC_DAT1), |
| 74 | GPIO(EMMC_DAT2), GPIO(EMMC_DAT3), |
| 75 | GPIO(EMMC_DAT4), GPIO(EMMC_DAT5), |
| 76 | GPIO(EMMC_DAT6), GPIO(EMMC_DAT7), |
| 77 | GPIO(EMMC_CMD), GPIO(EMMC_RSTB), |
| 78 | }; |
| 79 | |
| 80 | const gpio_t emmc_pd_pin[] = { |
| 81 | GPIO(EMMC_DSL), GPIO(EMMC_CLK), |
| 82 | }; |
| 83 | |
| 84 | for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++) |
| 85 | gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); |
| 86 | |
| 87 | for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++) |
| 88 | gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); |
| 89 | |
| 90 | /* set eMMC cmd/dat/clk/ds/rstb pins driving to 8mA */ |
| 91 | SET32_BITFIELDS(gpio_base, MSDC0_DRV, MSDC0_DRV_VALUE); |
Wenbin Mei | ca33b74a | 2021-08-04 10:53:27 +0800 | [diff] [blame] | 92 | |
| 93 | mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE); |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | static void configure_sdcard(void) |
| 97 | { |
| 98 | void *gpio_base = (void *)IOCFG_RB_BASE; |
| 99 | void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE; |
| 100 | void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE; |
| 101 | int i; |
| 102 | |
| 103 | const gpio_t sdcard_pu_pin[] = { |
| 104 | GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1), |
| 105 | GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3), |
| 106 | GPIO(MSDC1_CMD), |
| 107 | }; |
| 108 | |
| 109 | const gpio_t sdcard_pd_pin[] = { |
| 110 | GPIO(MSDC1_CLK), |
| 111 | }; |
| 112 | |
| 113 | for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++) |
| 114 | gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); |
| 115 | |
| 116 | for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) |
| 117 | gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); |
| 118 | |
| 119 | /* set sdcard cmd/dat/clk pins driving to 8mA */ |
| 120 | SET32_BITFIELDS(gpio_base, MSDC1_DRV, MSDC1_DRV_VALUE); |
| 121 | |
| 122 | /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */ |
| 123 | SET32_BITFIELDS(gpio_mode0_base, |
| 124 | MSDC1_GPIO_MODE0_0, MSDC1_GPIO_MODE0_VALUE, |
| 125 | MSDC1_GPIO_MODE0_1, MSDC1_GPIO_MODE0_VALUE); |
| 126 | |
| 127 | /* set sdcard dat1 pin to msdc1 mode */ |
| 128 | SET32_BITFIELDS(gpio_mode1_base, |
| 129 | MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE, |
| 130 | MSDC1_GPIO_MODE1_1, MSDC1_GPIO_MODE1_VALUE, |
| 131 | MSDC1_GPIO_MODE1_2, MSDC1_GPIO_MODE1_VALUE, |
| 132 | MSDC1_GPIO_MODE1_3, MSDC1_GPIO_MODE1_VALUE); |
| 133 | |
Rex-BC Chen | 97582de | 2021-07-22 11:16:15 +0800 | [diff] [blame] | 134 | mtk_i2c_bus_init(I2C7); |
Rex-BC Chen | cc80a9a | 2021-07-13 19:41:02 +0800 | [diff] [blame] | 135 | |
| 136 | if (CONFIG(BOARD_GOOGLE_CHERRY)) |
Rex-BC Chen | 97582de | 2021-07-22 11:16:15 +0800 | [diff] [blame] | 137 | mt6360_init(I2C7); |
Rex-BC Chen | cc80a9a | 2021-07-13 19:41:02 +0800 | [diff] [blame] | 138 | |
Rex-BC Chen | fdde4cd | 2021-07-13 18:55:58 +0800 | [diff] [blame] | 139 | mainboard_enable_regulator(MTK_REGULATOR_VCCQ, 1); |
| 140 | mainboard_enable_regulator(MTK_REGULATOR_VCC, 1); |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 141 | } |
| 142 | |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 143 | /* Set up backlight control pins as output pin and power-off by default */ |
| 144 | static void configure_panel_backlight(void) |
| 145 | { |
| 146 | gpio_output(GPIO_AP_EDP_BKLTEN, 0); |
| 147 | gpio_output(GPIO_BL_PWM_1V8, 0); |
| 148 | } |
| 149 | |
| 150 | static void power_on_panel(void) |
| 151 | { |
| 152 | /* Default power sequence for most panels. */ |
| 153 | gpio_set_pull(GPIO_EDP_HPD_1V8, GPIO_PULL_ENABLE, GPIO_PULL_UP); |
| 154 | gpio_set_mode(GPIO_EDP_HPD_1V8, 2); |
| 155 | gpio_output(GPIO_EN_PP3300_DISP_X, 1); |
| 156 | } |
| 157 | |
| 158 | static bool configure_display(void) |
| 159 | { |
| 160 | struct edid edid; |
| 161 | struct fb_info *info; |
| 162 | const char *name; |
| 163 | |
| 164 | printk(BIOS_INFO, "%s: Starting display initialization\n", __func__); |
| 165 | |
| 166 | mtcmos_display_power_on(); |
| 167 | mtcmos_protect_display_bus(); |
| 168 | configure_panel_backlight(); |
| 169 | power_on_panel(); |
| 170 | |
| 171 | mtk_ddp_init(); |
| 172 | mdelay(200); |
| 173 | |
| 174 | if (mtk_edp_init(&edid) < 0) { |
| 175 | printk(BIOS_ERR, "%s: Failed to initialize eDP\n", __func__); |
| 176 | return false; |
| 177 | } |
| 178 | name = edid.ascii_string; |
| 179 | if (name[0] == '\0') |
| 180 | name = "unknown name"; |
| 181 | printk(BIOS_INFO, "%s: '%s %s' %dx%d@%dHz\n", __func__, |
| 182 | edid.manufacturer_name, name, edid.mode.ha, edid.mode.va, |
| 183 | edid.mode.refresh); |
| 184 | |
| 185 | edid_set_framebuffer_bits_per_pixel(&edid, 32, 0); |
| 186 | |
| 187 | mtk_ddp_mode_set(&edid); |
| 188 | info = fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0); |
| 189 | if (info) |
| 190 | fb_set_orientation(info, LB_FB_ORIENTATION_NORMAL); |
| 191 | |
| 192 | return true; |
| 193 | } |
| 194 | |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 195 | static void mainboard_init(struct device *dev) |
| 196 | { |
Jitao Shi | f2c259c | 2021-06-03 13:51:29 +0800 | [diff] [blame] | 197 | if (display_init_required()) |
| 198 | configure_display(); |
| 199 | else |
| 200 | printk(BIOS_INFO, "%s: Skipped display initialization\n", __func__); |
| 201 | |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 202 | configure_emmc(); |
| 203 | configure_sdcard(); |
Yuchen Huang | 144237f | 2021-03-01 14:39:33 +0800 | [diff] [blame] | 204 | setup_usb_host(); |
Yidi Lin | 7c06dd9 | 2021-04-08 09:55:11 +0800 | [diff] [blame] | 205 | |
Trevor Wu | 1d19432 | 2021-08-17 15:58:11 +0800 | [diff] [blame^] | 206 | /* for audio usage */ |
| 207 | if (CONFIG(CHERRY_USE_RT1011)) |
| 208 | mtk_i2c_bus_init(I2C2); |
| 209 | |
Ryan Chuang | da63f09 | 2021-06-23 09:47:37 +0800 | [diff] [blame] | 210 | if (dpm_init()) |
| 211 | printk(BIOS_ERR, "dpm init failed, DVFS may not work\n"); |
| 212 | |
Rex-BC Chen | 9e3e0f5 | 2021-06-03 11:41:07 +0800 | [diff] [blame] | 213 | if (spm_init()) |
| 214 | printk(BIOS_ERR, "spm init failed, system suspend may not work\n"); |
| 215 | |
Yidi Lin | 7c06dd9 | 2021-04-08 09:55:11 +0800 | [diff] [blame] | 216 | register_reset_to_bl31(); |
Wenbin Mei | 24c6355 | 2021-02-24 15:17:41 +0800 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | static void mainboard_enable(struct device *dev) |
| 220 | { |
| 221 | dev->ops->init = &mainboard_init; |
| 222 | } |
| 223 | |
| 224 | struct chip_operations mainboard_ops = { |
| 225 | .name = CONFIG_MAINBOARD_PART_NUMBER, |
| 226 | .enable_dev = mainboard_enable, |
| 227 | }; |