Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 1 | .TH INTELTOOL 8 |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 2 | .SH NAME |
| 3 | inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters |
| 4 | .SH SYNOPSIS |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 5 | .B inteltool \fR[\fB\-vh?gGrpmedPMaAsfS\fR] |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 6 | .SH DESCRIPTION |
| 7 | .B inteltool |
| 8 | is a handy little tool for dumping the configuration space of Intel(R) |
| 9 | CPUs, northbridges and southbridges. |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 10 | .sp |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 11 | This tool has been developed for the coreboot project (see |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 12 | .B http://coreboot.org |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 13 | for details on coreboot). |
| 14 | .SH OPTIONS |
| 15 | .TP |
| 16 | .B "\-h, \-\-help" |
| 17 | Show a help text and exit. |
| 18 | .TP |
| 19 | .B "\-v, \-\-version" |
| 20 | Show version information and exit. |
| 21 | .TP |
| 22 | .B "\-a, \-\-all" |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 23 | Dump all known information listed below. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 24 | .TP |
| 25 | .B "\-g, \-\-gpio" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 26 | Dump I/O Controller Hub (ICH) southbridge GPIO registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 27 | .TP |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 28 | .B "\-G, \-\-gpio-diffs" |
| 29 | Show only GPIO register differences from hardware defaults. |
| 30 | .TP |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 31 | .B "\-r, \-\-rcba" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 32 | Dump I/O Controller Hub (ICH) southbridge RCBA registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 33 | .TP |
Alexander Couzens | aa3dd5d | 2015-01-03 02:52:10 +0100 | [diff] [blame] | 34 | .B "\-s, \-\-spi" |
| 35 | Dump I/O Controller Hub (ICH) southbridge SPI registers and bios control. |
| 36 | .TP |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 37 | .B "\-f, \-\-gfx" |
Stefan Tauner | 37fcd58 | 2016-05-10 23:16:33 +0200 | [diff] [blame] | 38 | .RB "Dump graphics registers. " \ |
| 39 | "Due to unknown reasons this might lock up some systems after a few seconds." |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 40 | .TP |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 41 | .B "\-p, \-\-pmbase" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 42 | Dump I/O Controller Hub (ICH) southbridge PMBASE registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 43 | .TP |
| 44 | .B "\-m, \-\-mchbar" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 45 | Dump Intel(R) northbridge MCHBAR registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 46 | .TP |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 47 | .BR "\-S" " \fIfile\fR, " "\-\-spd=" "\fIfile\fR" |
| 48 | Dump the memory registers as above and store the current timing settings |
| 49 | into \fIfile\fR. |
| 50 | .TP |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 51 | .B "\-e, \-\-epbar" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 52 | Dump Intel(R) northbridge EPBAR registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 53 | .TP |
| 54 | .B "\-d, \-\-dmibar" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 55 | Dump Intel(R) northbridge DMIBAR registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 56 | .TP |
| 57 | .B "\-P, \-\-pciexbar" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 58 | Dump Intel(R) northbridge PCIEXBAR registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 59 | .TP |
| 60 | .B "\-M, \-\-msrs" |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 61 | Dump Intel(R) CPU MSRs. |
Stefan Tauner | 572f074 | 2016-05-05 17:29:39 +0200 | [diff] [blame] | 62 | .TP |
| 63 | .B "\-A, \-\-ambs" |
| 64 | Dump Advanced Memory Buffer (AMB) registers. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 65 | .SH BUGS |
Martin Roth | 48a243b | 2014-12-07 22:25:02 -0700 | [diff] [blame] | 66 | Please report any bugs on the coreboot mailing list |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 67 | .RB "(" http://coreboot.org/Mailinglist ")." |
| 68 | .SH LICENCE |
| 69 | .B inteltool |
Stefan Reinauer | 58a1cc1 | 2008-05-14 14:47:32 +0000 | [diff] [blame] | 70 | is covered by the GNU General Public License (GPL), version 2. |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 71 | .SH COPYRIGHT |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 72 | Copyright (C) 2008 coresystems GmbH |
Stefan Reinauer | 03646be | 2008-05-13 22:14:21 +0000 | [diff] [blame] | 73 | .SH AUTHORS |
| 74 | Stefan Reinauer <stepan@coresystems.de> |
| 75 | .PP |
| 76 | This manual page was written by Stefan Reinauer <stepan@coresystems.de>. |
| 77 | It is licensed under the terms of the GNU GPL (version 2). |
Uwe Hermann | 9a6b6b5 | 2008-05-14 21:20:55 +0000 | [diff] [blame] | 78 | .sp |
| 79 | Intel(R) is a registered trademark of Intel Corporation. Other product |
| 80 | and/or company names mentioned herein may be trademarks or registered |
| 81 | trademarks of their respective owners. |