Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 1 | chip soc/intel/alderlake |
Patrick Rudolph | f7f7b3b | 2023-03-29 15:34:07 +0200 | [diff] [blame] | 2 | register "power_limits_config[ADL_P_282_442_482_28W_CORE]" = "{ |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 3 | .tdp_pl1_override = 20, |
| 4 | .tdp_pl2_override = 56, |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 5 | }" |
| 6 | |
| 7 | # GPE configuration |
| 8 | register "pmc_gpe0_dw0" = "PMC_GPP_A" |
| 9 | register "pmc_gpe0_dw1" = "PMC_GPP_R" |
| 10 | register "pmc_gpe0_dw2" = "PMC_GPD" |
| 11 | |
| 12 | device domain 0 on |
| 13 | subsystemid 0x1558 0x7716 inherit |
| 14 | |
| 15 | device ref pcie4_0 on |
| 16 | # PCIe PEG0 x4, Clock 0 (SSD2) |
| 17 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 18 | .clk_src = 0, |
| 19 | .clk_req = 0, |
Tim Crawford | d7c8d7d | 2023-01-04 10:01:05 -0700 | [diff] [blame] | 20 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 21 | }" |
Tim Crawford | e51f96f | 2023-01-04 09:55:13 -0700 | [diff] [blame] | 22 | chip soc/intel/common/block/pcie/rtd3 |
| 23 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_EN |
| 24 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_CPU_SSD2_RST# |
| 25 | register "srcclk_pin" = "0" # SSD2_CLKREQ# |
| 26 | device generic 0 on end |
| 27 | end |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 28 | end |
| 29 | device ref tcss_xhci on |
| 30 | register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 31 | chip drivers/usb/acpi |
| 32 | device ref tcss_root_hub on |
| 33 | chip drivers/usb/acpi |
| 34 | register "desc" = ""USB3 TBT Type-C"" |
| 35 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 36 | device ref tcss_usb3_port1 on end |
| 37 | end |
| 38 | end |
| 39 | end |
| 40 | end |
| 41 | device ref xhci on |
Felix Singer | 1b102ca | 2023-10-26 16:32:19 +0200 | [diff] [blame^] | 42 | register "usb2_ports" = "{ |
| 43 | [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Motherboard */ |
| 44 | [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Multi Board */ |
| 45 | [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen 2) */ |
| 46 | [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ |
| 47 | [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunderbolt) */ |
| 48 | [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ |
| 49 | [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ |
| 50 | }" |
| 51 | register "usb3_ports" = "{ |
| 52 | [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Motherboard */ |
| 53 | [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */ |
| 54 | [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH2 */ |
| 55 | }" |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 56 | # ACPI |
| 57 | chip drivers/usb/acpi |
| 58 | device ref xhci_root_hub on |
| 59 | chip drivers/usb/acpi |
| 60 | register "desc" = ""USB2 UJ_USB1"" |
| 61 | register "type" = "UPC_TYPE_A" |
| 62 | device ref usb2_port1 on end |
| 63 | end |
| 64 | chip drivers/usb/acpi |
| 65 | register "desc" = ""USB2 J_USB3_1"" |
| 66 | register "type" = "UPC_TYPE_A" |
| 67 | device ref usb2_port2 on end |
| 68 | end |
| 69 | chip drivers/usb/acpi |
| 70 | register "desc" = ""USB2 J_TYPEC1"" |
| 71 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 72 | device ref usb2_port3 on end |
| 73 | end |
| 74 | chip drivers/usb/acpi |
| 75 | register "desc" = ""USB2 Fingerprint"" |
| 76 | register "type" = "UPC_TYPE_INTERNAL" |
| 77 | device ref usb2_port5 on end |
| 78 | end |
| 79 | chip drivers/usb/acpi |
| 80 | register "desc" = ""USB2 J_TYPEC2"" |
| 81 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 82 | device ref usb2_port6 on end |
| 83 | end |
| 84 | chip drivers/usb/acpi |
| 85 | register "desc" = ""USB2 Camera"" |
| 86 | register "type" = "UPC_TYPE_INTERNAL" |
| 87 | device ref usb2_port7 on end |
| 88 | end |
| 89 | chip drivers/usb/acpi |
| 90 | register "desc" = ""USB2 Bluetooth"" |
| 91 | register "type" = "UPC_TYPE_INTERNAL" |
| 92 | device ref usb2_port10 on end |
| 93 | end |
| 94 | chip drivers/usb/acpi |
| 95 | register "desc" = ""USB3 J_USB3_1"" |
| 96 | register "type" = "UPC_TYPE_A" |
| 97 | device ref usb3_port1 on end |
| 98 | end |
| 99 | chip drivers/usb/acpi |
| 100 | register "desc" = ""USB3 J_TYPEC1 CH0"" |
| 101 | register "type" = "UPC_TYPE_A" |
| 102 | device ref usb3_port2 on end |
| 103 | end |
| 104 | chip drivers/usb/acpi |
| 105 | register "desc" = ""USB3 J_TYPEC1 CH1"" |
| 106 | register "type" = "UPC_TYPE_A" |
| 107 | device ref usb3_port3 on end |
| 108 | end |
| 109 | end |
| 110 | end |
| 111 | end |
| 112 | device ref tcss_dma0 on |
| 113 | chip drivers/intel/usb4/retimer |
| 114 | register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" |
| 115 | use tcss_usb3_port1 as dfp[0].typec_port |
| 116 | device generic 0 on end |
| 117 | end |
| 118 | end |
| 119 | device ref pcie_rp5 on |
| 120 | # PCIe RP#5 x1, Clock 2 (WLAN) |
| 121 | register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| 122 | .clk_src = 2, |
| 123 | .clk_req = 2, |
| 124 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 125 | }" |
| 126 | chip soc/intel/common/block/pcie/rtd3 |
| 127 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" # WLAN_EN |
| 128 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B17)" # WLAN_RST#_R |
| 129 | register "srcclk_pin" = "2" # WLAN_CLKREQ# |
| 130 | device generic 0 on end |
| 131 | end |
| 132 | end |
| 133 | device ref pcie_rp6 on |
| 134 | # PCIe RP#6 x1, Clock 5 (CARD) |
| 135 | register "pch_pcie_rp[PCH_RP(6)]" = "{ |
| 136 | .clk_src = 5, |
| 137 | .clk_req = 5, |
| 138 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| 139 | }" |
| 140 | end |
| 141 | device ref pcie_rp8 on |
| 142 | # PCIe RP#8 x1, Clock 6 (GLAN) |
| 143 | register "pch_pcie_rp[PCH_RP(8)]" = "{ |
| 144 | .clk_src = 6, |
| 145 | .clk_req = 6, |
| 146 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 147 | }" |
| 148 | end |
| 149 | device ref pcie_rp9 on |
| 150 | # PCIe RP#9 x4, Clock 4 (SSD1) |
| 151 | register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| 152 | .clk_src = 4, |
| 153 | .clk_req = 4, |
| 154 | .flags = PCIE_RP_LTR, |
| 155 | }" |
Tim Crawford | e56c738 | 2023-07-19 11:39:55 -0600 | [diff] [blame] | 156 | # FIXME: Drives do not exit D3cold on S3 exit |
| 157 | #chip soc/intel/common/block/pcie/rtd3 |
| 158 | # register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN |
| 159 | # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B16)" # M2_SSD1_RST# |
| 160 | # register "srcclk_pin" = "4" # SSD1_CLKREQ# |
| 161 | # device generic 0 on end |
| 162 | #end |
Tim Crawford | fa5a475 | 2022-11-01 11:59:02 -0600 | [diff] [blame] | 163 | end |
| 164 | device ref pmc hidden |
| 165 | chip drivers/intel/pmc_mux |
| 166 | device generic 0 on |
| 167 | chip drivers/intel/pmc_mux/conn |
| 168 | # J_TYPEC2 |
| 169 | use usb2_port6 as usb2_port |
| 170 | use tcss_usb3_port1 as usb3_port |
| 171 | device generic 0 alias conn0 on end |
| 172 | end |
| 173 | end |
| 174 | end |
| 175 | end |
| 176 | end |
| 177 | end |