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Ronak Kanabar1ae366f2023-06-07 01:21:56 +05301/** @file
2 Support for the PCI Express 3.0 standard.
3
4 This header file may not define all structures. Please extend as required.
5
6 Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9**/
10
11#ifndef _PCIEXPRESS30_H_
12#define _PCIEXPRESS30_H_
13
14#include <IndustryStandard/PciExpress21.h>
15
16#pragma pack(1)
17
18#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID 0x0019
19#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_VER1 0x1
20
21typedef union {
22 struct {
23 UINT32 PerformEqualization : 1;
24 UINT32 LinkEqualizationRequestInterruptEnable : 1;
25 UINT32 Reserved : 30;
26 } Bits;
27 UINT32 Uint32;
28} PCI_EXPRESS_REG_LINK_CONTROL3;
29
30typedef union {
31 struct {
32 UINT16 DownstreamPortTransmitterPreset : 4;
33 UINT16 DownstreamPortReceiverPresetHint : 3;
34 UINT16 Reserved : 1;
35 UINT16 UpstreamPortTransmitterPreset : 4;
36 UINT16 UpstreamPortReceiverPresetHint : 3;
37 UINT16 Reserved2 : 1;
38 } Bits;
39 UINT16 Uint16;
40} PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL;
41
42typedef struct {
43 PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
44 PCI_EXPRESS_REG_LINK_CONTROL3 LinkControl3;
45 UINT32 LaneErrorStatus;
46 PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];
47} PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;
48
49#pragma pack()
50
51#endif