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review.coreboot.org / coreboot / 1ac2ad0fbe8c1d7029e4f593fefe763212df6728 / . / src / soc / intel / cannonlake / vr_config.c
blob: 25270d8f9812282bfec4bc21b02ad5fa02d06ec9 [file] [log] [blame]
Pratik Prajapati9027e1b2017-08-23 17:37:43 -0700[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <fsp/api.h>
18#include <soc/ramstage.h>
19#include <soc/vr_config.h>
20
21static const struct vr_config default_configs[NUM_VR_DOMAINS] = {
Roy Mingi Park1ac2ad02019-02-13 11:10:45 -0800[diff] [blame^]22 [VR_SYSTEM_AGENT] = {
23 .vr_config_enable = 1,
24 .psi1threshold = VR_CFG_AMP(20),
25 .psi2threshold = VR_CFG_AMP(5),
26 .psi3threshold = VR_CFG_AMP(1),
27 .psi3enable = 1,
28 .psi4enable = 1,
29 .imon_slope = 0x0,
30 .imon_offset = 0x0,
31 .icc_max = VR_CFG_AMP(6),
32 .voltage_limit = 1520,
33 },
34 [VR_IA_CORE] = {
35 .vr_config_enable = 1,
36 .psi1threshold = VR_CFG_AMP(20),
37 .psi2threshold = VR_CFG_AMP(5),
38 .psi3threshold = VR_CFG_AMP(1),
39 .psi3enable = 1,
40 .psi4enable = 1,
41 .imon_slope = 0x0,
42 .imon_offset = 0x0,
43 .icc_max = VR_CFG_AMP(70),
44 .voltage_limit = 1520,
45 },
46 [VR_GT_UNSLICED] = {
47 .vr_config_enable = 1,
48 .psi1threshold = VR_CFG_AMP(20),
49 .psi2threshold = VR_CFG_AMP(5),
50 .psi3threshold = VR_CFG_AMP(1),
51 .psi3enable = 1,
52 .psi4enable = 1,
53 .imon_slope = 0x0,
54 .imon_offset = 0x0,
55 .icc_max = VR_CFG_AMP(31),
56 .voltage_limit = 1520,
57 },
58 [VR_GT_SLICED] = {
59 .vr_config_enable = 1,
60 .psi1threshold = VR_CFG_AMP(20),
61 .psi2threshold = VR_CFG_AMP(5),
62 .psi3threshold = VR_CFG_AMP(1),
63 .psi3enable = 1,
64 .psi4enable = 1,
65 .imon_slope = 0x0,
66 .imon_offset = 0x0,
67 .icc_max = VR_CFG_AMP(31),
68 .voltage_limit = 1520,
69 },
Pratik Prajapati9027e1b2017-08-23 17:37:43 -0700[diff] [blame]70};
71
72void fill_vr_domain_config(void *params,
73 int domain, const struct vr_config *chip_cfg)
74{
75 FSP_S_CONFIG *vr_params = (FSP_S_CONFIG *)params;
76 const struct vr_config *cfg;
77
78 if (domain < 0 || domain >= NUM_VR_DOMAINS)
79 return;
80
81 /* Use device tree override if requested. */
82 if (chip_cfg->vr_config_enable)
83 cfg = chip_cfg;
84 else
85 cfg = &default_configs[domain];
86
87 vr_params->VrConfigEnable[domain] = cfg->vr_config_enable;
88 vr_params->Psi1Threshold[domain] = cfg->psi1threshold;
89 vr_params->Psi2Threshold[domain] = cfg->psi2threshold;
90 vr_params->Psi3Threshold[domain] = cfg->psi3threshold;
91 vr_params->Psi3Enable[domain] = cfg->psi3enable;
92 vr_params->Psi4Enable[domain] = cfg->psi4enable;
93 vr_params->ImonSlope[domain] = cfg->imon_slope;
94 vr_params->ImonOffset[domain] = cfg->imon_offset;
95 vr_params->IccMax[domain] = cfg->icc_max;
96 vr_params->VrVoltageLimit[domain] = cfg->voltage_limit;
97 vr_params->AcLoadline[domain] = cfg->ac_loadline;
98 vr_params->DcLoadline[domain] = cfg->dc_loadline;
99}