WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <stdint.h> |
| 21 | #include <string.h> |
| 22 | #include <device/pci_def.h> |
| 23 | #include <device/pci_ids.h> |
Kyösti Mälkki | 207880c | 2013-12-10 09:03:17 +0200 | [diff] [blame] | 24 | #include <arch/acpi.h> |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 25 | #include <arch/io.h> |
| 26 | #include <arch/stages.h> |
| 27 | #include <device/pnp_def.h> |
| 28 | #include <arch/cpu.h> |
| 29 | #include <cpu/x86/lapic.h> |
| 30 | #include <console/console.h> |
| 31 | #include <console/loglevel.h> |
Edward O'Callaghan | bf9d122 | 2014-10-29 09:26:00 +1100 | [diff] [blame] | 32 | #include <cpu/amd/car.h> |
Kyösti Mälkki | f21c2ac | 2014-10-19 09:35:18 +0300 | [diff] [blame] | 33 | #include <northbridge/amd/agesa/agesawrapper.h> |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 34 | #include "cpu/x86/bist.h" |
| 35 | #include "cpu/x86/lapic.h" |
| 36 | #include "southbridge/amd/agesa/hudson/hudson.h" |
| 37 | #include "cpu/amd/agesa/s3_resume.h" |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 38 | #include "cbmem.h" |
Edward O'Callaghan | 92da206 | 2014-05-13 23:52:30 +1000 | [diff] [blame] | 39 | #include <superio/winbond/common/winbond.h> |
| 40 | #include <superio/winbond/w83627uhg/w83627uhg.h> |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 41 | |
| 42 | #define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1) |
| 43 | |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 44 | |
| 45 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 46 | { |
| 47 | u32 val, t32; |
| 48 | u32 *addr32; |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 49 | |
| 50 | /* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for |
| 51 | * LpcClk[1:0]". To be consistent with Parmer, setting to 4mA |
| 52 | * even though the register is not documented in the Kabini BKDG. |
| 53 | * Otherwise the serial output is bad code. |
| 54 | */ |
| 55 | //outb(0xD2, 0xcd6); |
| 56 | //outb(0x00, 0xcd7); |
| 57 | |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 58 | agesawrapper_amdinitmmio(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 59 | |
Kyösti Mälkki | 88ff8b5 | 2014-11-21 17:40:37 +0200 | [diff] [blame] | 60 | /* Set LPC decode enables. */ |
| 61 | pci_devfn_t dev = PCI_DEV(0, 0x14, 3); |
| 62 | pci_write_config32(dev, 0x44, 0xff03ffd5); |
| 63 | |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 64 | hudson_lpc_port80(); |
| 65 | |
| 66 | /* Enable the AcpiMmio space */ |
| 67 | outb(0x24, 0xcd6); |
| 68 | outb(0x1, 0xcd7); |
| 69 | |
| 70 | /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ |
| 71 | addr32 = (u32 *)0xfed80e28; |
| 72 | t32 = *addr32; |
| 73 | t32 &= 0xfff8ffff; |
| 74 | *addr32 = t32; |
| 75 | |
| 76 | /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ |
| 77 | addr32 = (u32 *)0xfed80e40; |
| 78 | t32 = *addr32; |
| 79 | t32 &= 0xffffbffb; |
| 80 | *addr32 = t32; |
| 81 | |
| 82 | if (!cpu_init_detectedx && boot_cpu()) { |
| 83 | post_code(0x30); |
| 84 | post_code(0x31); |
| 85 | |
Edward O'Callaghan | 92da206 | 2014-05-13 23:52:30 +1000 | [diff] [blame] | 86 | /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */ |
| 87 | winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 88 | |
| 89 | console_init(); |
| 90 | } |
| 91 | |
| 92 | /* Halt if there was a built in self test failure */ |
| 93 | post_code(0x34); |
| 94 | report_bist_failure(bist); |
| 95 | |
| 96 | /* Load MPB */ |
| 97 | val = cpuid_eax(1); |
Elyes HAOUAS | aedcc10 | 2014-07-21 08:07:19 +0200 | [diff] [blame] | 98 | printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); |
| 99 | printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 100 | |
| 101 | /* On Larne, after LpcClkDrvSth is set, it needs some time to be stable, because of the buffer ICS551M */ |
| 102 | int i; |
| 103 | for(i = 0; i < 200000; i++) |
| 104 | val = inb(0xcd6); |
| 105 | |
| 106 | post_code(0x37); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 107 | agesawrapper_amdinitreset(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 108 | post_code(0x38); |
| 109 | printk(BIOS_DEBUG, "Got past yangtze_early_setup\n"); |
| 110 | |
| 111 | post_code(0x39); |
| 112 | |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 113 | agesawrapper_amdinitearly(); |
Kyösti Mälkki | e1b468e | 2014-06-18 09:10:53 +0300 | [diff] [blame] | 114 | int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed(); |
| 115 | if (!s3resume) { |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 116 | post_code(0x40); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 117 | agesawrapper_amdinitpost(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 118 | post_code(0x41); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 119 | agesawrapper_amdinitenv(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 120 | /* TODO: Disable cache is not ok. */ |
| 121 | disable_cache_as_ram(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 122 | } else { /* S3 detect */ |
| 123 | printk(BIOS_INFO, "S3 detected\n"); |
| 124 | |
| 125 | post_code(0x60); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 126 | agesawrapper_amdinitresume(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 127 | |
Kyösti Mälkki | b139b5e | 2014-10-20 07:41:20 +0300 | [diff] [blame] | 128 | agesawrapper_amdinitcpuio(); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame^] | 129 | agesawrapper_amds3laterestore(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 130 | |
| 131 | post_code(0x61); |
Kyösti Mälkki | 23b4f0c | 2014-06-18 09:55:26 +0300 | [diff] [blame] | 132 | prepare_for_resume(); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 133 | } |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 134 | |
| 135 | outb(0xEA, 0xCD6); |
| 136 | outb(0x1, 0xcd7); |
WANG Siyuan | f77f734 | 2013-08-13 17:09:51 +0800 | [diff] [blame] | 137 | |
| 138 | post_code(0x50); |
| 139 | copy_and_run(); |
| 140 | |
| 141 | post_code(0x54); /* Should never see this post code. */ |
| 142 | } |