Patrick Georgi | 593124d | 2020-05-10 19:44:08 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
| 2 | /* This is a driver for a Command Response Buffer Interface */ |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 3 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 4 | #include <security/tpm/tss_errors.h> |
| 5 | |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 6 | /* CRB driver */ |
| 7 | /* address of locality 0 (CRB) */ |
| 8 | #define TPM_CRB_BASE_ADDRESS CONFIG_CRB_TPM_BASE_ADDRESS |
| 9 | |
| 10 | #define CRB_REG(LOCTY, REG) \ |
Patrick Rudolph | d147d43 | 2020-12-08 10:18:33 +0100 | [diff] [blame] | 11 | (void *)(uintptr_t)(CONFIG_CRB_TPM_BASE_ADDRESS + (LOCTY << 12) + REG) |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 12 | |
| 13 | /* hardware registers */ |
| 14 | #define CRB_REG_LOC_STATE 0x00 |
| 15 | #define CRB_REG_LOC_CTRL 0x08 |
| 16 | #define CRB_REG_LOC_STS 0x0C |
| 17 | |
| 18 | /* LOC_CTRL BIT MASKS */ |
| 19 | #define LOC_CTRL_REQ_ACCESS 0x01 |
| 20 | |
| 21 | /* LOC STATE BIT MASKS */ |
| 22 | #define LOC_STATE_LOC_ASSIGN 0x02 |
| 23 | #define LOC_STATE_REG_VALID_STS 0x80 |
| 24 | |
| 25 | /* LOC STS BIT MASKS */ |
| 26 | #define LOC_STS_GRANTED 0x01 |
| 27 | |
| 28 | #define CRB_REG_INTF_ID 0x30 |
| 29 | #define CRB_REG_REQUEST 0x40 |
| 30 | #define CRB_REG_STATUS 0x44 |
| 31 | #define CRB_REG_CANCEL 0x48 |
| 32 | #define CRB_REG_START 0x4C |
| 33 | #define CRB_REG_INT_CTRL 0x50 |
| 34 | #define CRB_REG_CMD_SIZE 0x58 |
| 35 | #define CRB_REG_CMD_ADDR 0x5C |
| 36 | #define CRB_REG_RESP_SIZE 0x64 |
| 37 | #define CRB_REG_RESP_ADDR 0x68 |
Michał Żygowski | d02bb67 | 2022-04-29 13:25:07 +0200 | [diff] [blame] | 38 | #define CRB_REG_DATA_BUFF 0x80 |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 39 | |
| 40 | /* CRB INTF BIT MASK */ |
| 41 | #define CRB_INTF_REG_CAP_CRB (1<<14) |
| 42 | #define CRB_INTF_REG_INTF_SEL (1<<17) |
| 43 | #define CRB_INTF_REG_INTF_LOCK (1<<19) |
| 44 | |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 45 | /*REQUEST Register related */ |
| 46 | #define CRB_REG_REQUEST_CMD_RDY 0x01 |
| 47 | #define CRB_REG_REQUEST_GO_IDLE 0x02 |
| 48 | |
| 49 | /* STATUS Register related */ |
| 50 | #define CRB_REG_STATUS_ERROR 0x01 |
| 51 | #define CRB_REG_STATUS_IDLE 0x02 |
| 52 | |
| 53 | /* START Register related */ |
| 54 | #define CRB_REG_START_START 0x01 |
| 55 | |
Sergii Dmytruk | 1a90314 | 2024-04-12 15:47:04 +0300 | [diff] [blame^] | 56 | /* CRB TPM Info Struct */ |
| 57 | struct crb_tpm_info { |
Christian Walter | 7706a04 | 2019-07-05 19:46:30 +0200 | [diff] [blame] | 58 | uint16_t vendor_id; |
| 59 | uint16_t device_id; |
| 60 | uint16_t revision; |
| 61 | }; |
| 62 | |
Sergii Dmytruk | 1a90314 | 2024-04-12 15:47:04 +0300 | [diff] [blame^] | 63 | tpm_result_t crb_tpm_init(void); |
| 64 | void crb_tpm_get_info(struct crb_tpm_info *crb_tpm_info); |
| 65 | size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size, |
| 66 | void *tpm2_response, size_t max_response); |
| 67 | bool crb_tpm_is_active(void); |