blob: 4bc80092b55ddcad31136110945d1d8bf0b6df04 [file] [log] [blame]
Angel Pons32859fc2020-04-02 23:48:27 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Kyösti Mälkki1cae4542020-01-06 12:31:34 +02002
3#ifndef __DEVICE_SMBUS_HOST_H__
4#define __DEVICE_SMBUS_HOST_H__
5
6#include <stdint.h>
Kyösti Mälkkif555a582020-01-06 19:41:42 +02007#include <console/console.h>
Kyösti Mälkki1cae4542020-01-06 12:31:34 +02008
9/* Low-level SMBUS host controller. */
10
11int do_smbus_recv_byte(uintptr_t base, u8 device);
12int do_smbus_send_byte(uintptr_t base, u8 device, u8 val);
13int do_smbus_read_byte(uintptr_t base, u8 device, u8 address);
14int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data);
15int do_smbus_read_word(uintptr_t base, u8 device, u8 address);
16int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data);
17
18int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf);
19int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, size_t bytes, const u8 *buf);
Christian Walter04953eb2020-03-27 11:59:43 +010020int do_smbus_process_call(uintptr_t base, u8 device, u8 cmd, u16 data, u16 *buf);
Kyösti Mälkki1cae4542020-01-06 12:31:34 +020021
22/* For Intel, implemented since ICH5. */
23int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, size_t bytes, u8 *buf);
24int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf);
25
Kyösti Mälkki7cdcc382020-01-06 19:00:31 +020026/* Upstream API */
27
Kyösti Mälkkif555a582020-01-06 19:41:42 +020028uintptr_t smbus_base(void);
29int smbus_enable_iobar(uintptr_t base);
Kyösti Mälkki7cdcc382020-01-06 19:00:31 +020030void smbus_host_reset(uintptr_t base);
Kyösti Mälkki73451fd2020-01-06 19:00:31 +020031void smbus_set_slave_addr(uintptr_t base, u8 slave_address);
Kyösti Mälkki7cdcc382020-01-06 19:00:31 +020032
Kyösti Mälkkif555a582020-01-06 19:41:42 +020033static inline void enable_smbus(void)
34{
35 uintptr_t base = smbus_base();
36
37 if (smbus_enable_iobar(base) < 0)
38 die("SMBus controller not found!");
39
40 smbus_host_reset(base);
41 printk(BIOS_DEBUG, "SMBus controller enabled\n");
42}
43
Kyösti Mälkki1a1b04e2020-01-07 22:34:33 +020044#if DEVTREE_EARLY
45static inline int smbus_read_byte(u8 device, u8 address)
46{
47 uintptr_t base = smbus_base();
48 return do_smbus_read_byte(base, device, address);
49}
50
51static inline int smbus_read_word(u8 device, u8 address)
52{
53 uintptr_t base = smbus_base();
54 return do_smbus_read_word(base, device, address);
55}
56
57static inline int smbus_write_byte(u8 device, u8 address, u8 data)
58{
59 uintptr_t base = smbus_base();
60 return do_smbus_write_byte(base, device, address, data);
61}
62
63static inline int smbus_block_read(u8 device, u8 cmd, size_t max_bytes, u8 *buf)
64{
65 uintptr_t base = smbus_base();
66 return do_smbus_block_read(base, device, cmd, max_bytes, buf);
67}
68
69static inline int smbus_block_write(u8 device, u8 cmd, size_t bytes, const u8 *buf)
70{
71 uintptr_t base = smbus_base();
72 return do_smbus_block_write(base, device, cmd, bytes, buf);
73}
74
75static inline int i2c_eeprom_read(u8 device, u8 offset, size_t bytes, u8 *buf)
76{
77 uintptr_t base = smbus_base();
78 return do_i2c_eeprom_read(base, device, offset, bytes, buf);
79}
80#endif
81
Kyösti Mälkki1cae4542020-01-06 12:31:34 +020082#endif