blob: 6044c4b077f6b5a0919e48fbfdc1f0d9fcea1ae5 [file] [log] [blame]
Stefan Reinauer1a08f582009-10-28 16:52:48 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
19 * MA 02110-1301 USA
20 */
21
22DefinitionBlock(
23 "dsdt.aml",
24 "DSDT",
25 0x02, // DSDT revision: ACPI v2.0
26 "COREv2", // OEM id
27 "COREBOOT", // OEM table id
28 0x20090419 // OEM revision
29)
30{
31 // Some generic macros
32 #include "acpi/platform.asl"
33
34 // global NVS and variables
35 #include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl"
36
37 // General Purpose Events
38 //#include "acpi/gpe.asl"
39
40 // mainboard specific devices
41 #include "acpi/mainboard.asl"
42
43 // Thermal Zone
44 //#include "acpi/thermal.asl"
45
46 Scope (\_SB) {
47 Device (PCI0)
48 {
49 #include "../../../northbridge/intel/i945/acpi/i945.asl"
50 #include "../../../southbridge/intel/i82801gx/acpi/ich7.asl"
51 }
52 }
53
54 /* Chipset specific sleep states */
55 #include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl"
56}