Felix Held | dba3fe7 | 2021-02-13 01:05:56 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #ifndef AMD_BLOCK_DATA_FABRIC_H |
| 4 | #define AMD_BLOCK_DATA_FABRIC_H |
| 5 | |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 6 | #include <amdblocks/data_fabric_defs.h> |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 7 | #include <amdblocks/pci_devs.h> |
| 8 | #include <device/pci_ops.h> |
Fred Reitberger | 2890841 | 2022-11-01 10:49:16 -0400 | [diff] [blame] | 9 | #include <soc/data_fabric.h> |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 10 | #include <soc/pci_devs.h> |
Felix Held | dba3fe7 | 2021-02-13 01:05:56 +0100 | [diff] [blame] | 11 | #include <stdint.h> |
| 12 | |
| 13 | #define BROADCAST_FABRIC_ID 0xff |
| 14 | |
Felix Held | 9e0f964 | 2023-06-16 16:28:14 +0200 | [diff] [blame] | 15 | /* Index of IOAPIC resource associated with IOMMU */ |
Naresh Solanki | 4ef89f7 | 2023-05-25 17:37:50 +0200 | [diff] [blame] | 16 | #define IOMMU_IOAPIC_IDX 0x20000120 |
| 17 | |
Felix Held | 4e4dde4 | 2023-02-07 12:13:00 +0100 | [diff] [blame] | 18 | #define DF_MMIO_REG_OFFSET(instance) ((instance) * DF_MMIO_REG_SET_SIZE * sizeof(uint32_t)) |
| 19 | |
Felix Held | 985f3e0 | 2021-02-13 20:47:04 +0100 | [diff] [blame] | 20 | /* The number of data fabric MMIO registers is SoC-specific */ |
Felix Held | 4e4dde4 | 2023-02-07 12:13:00 +0100 | [diff] [blame] | 21 | #define DF_MMIO_BASE(reg) (D18F0_MMIO_BASE0 + DF_MMIO_REG_OFFSET(reg)) |
| 22 | #define DF_MMIO_LIMIT(reg) (D18F0_MMIO_LIMIT0 + DF_MMIO_REG_OFFSET(reg)) |
| 23 | #define DF_MMIO_CONTROL(reg) (D18F0_MMIO_CTRL0 + DF_MMIO_REG_OFFSET(reg)) |
Felix Held | 985f3e0 | 2021-02-13 20:47:04 +0100 | [diff] [blame] | 24 | |
Felix Held | 407bd58 | 2023-04-24 17:58:24 +0200 | [diff] [blame] | 25 | /* Last 12GB of the usable address space are reserved */ |
| 26 | #define DF_RESERVED_TOP_12GB_MMIO_SIZE (12ULL * GiB) |
| 27 | |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 28 | uint32_t data_fabric_read32(uint16_t fn_reg, uint8_t instance_id); |
| 29 | void data_fabric_write32(uint16_t fn_reg, uint8_t instance_id, uint32_t data); |
Felix Held | dba3fe7 | 2021-02-13 01:05:56 +0100 | [diff] [blame] | 30 | |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 31 | static __always_inline |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 32 | uint32_t data_fabric_broadcast_read32(uint16_t fn_reg) |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 33 | { |
| 34 | /* No bit masking required. Macros will apply mask to values. */ |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 35 | return pci_read_config32(_SOC_DEV(DF_DEV, DF_REG_FN(fn_reg)), DF_REG_OFFSET(fn_reg)); |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 36 | } |
| 37 | |
| 38 | static __always_inline |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 39 | void data_fabric_broadcast_write32(uint16_t fn_reg, uint32_t data) |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 40 | { |
| 41 | /* No bit masking required. Macros will apply mask to values. */ |
Felix Held | 18a3c23 | 2023-08-03 00:10:03 +0200 | [diff] [blame^] | 42 | pci_write_config32(_SOC_DEV(DF_DEV, DF_REG_FN(fn_reg)), DF_REG_OFFSET(fn_reg), data); |
Felix Held | 789f6f7 | 2021-02-13 01:09:28 +0100 | [diff] [blame] | 43 | } |
| 44 | |
Felix Held | 906f9be | 2021-02-13 20:38:08 +0100 | [diff] [blame] | 45 | void data_fabric_print_mmio_conf(void); |
Felix Held | 602f93e | 2021-02-13 21:10:08 +0100 | [diff] [blame] | 46 | void data_fabric_disable_mmio_reg(unsigned int reg); |
| 47 | int data_fabric_find_unused_mmio_reg(void); |
Fred Reitberger | 31e6298 | 2022-10-31 14:18:20 -0400 | [diff] [blame] | 48 | void data_fabric_set_mmio_np(void); |
Felix Held | 602f93e | 2021-02-13 21:10:08 +0100 | [diff] [blame] | 49 | |
Felix Held | 407bd58 | 2023-04-24 17:58:24 +0200 | [diff] [blame] | 50 | /* Inform the resource allocator about the usable IO and MMIO regions and PCI bus numbers */ |
| 51 | void amd_pci_domain_read_resources(struct device *domain); |
| 52 | void amd_pci_domain_scan_bus(struct device *domain); |
| 53 | |
Felix Held | 7a5dd78 | 2023-04-28 22:47:33 +0200 | [diff] [blame] | 54 | void amd_pci_domain_fill_ssdt(const struct device *domain); |
| 55 | |
Felix Held | dba3fe7 | 2021-02-13 01:05:56 +0100 | [diff] [blame] | 56 | #endif /* AMD_BLOCK_DATA_FABRIC_H */ |