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Felix Helddba3fe72021-02-13 01:05:56 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef AMD_BLOCK_DATA_FABRIC_H
4#define AMD_BLOCK_DATA_FABRIC_H
5
Felix Held18a3c232023-08-03 00:10:03 +02006#include <amdblocks/data_fabric_defs.h>
Felix Held789f6f72021-02-13 01:09:28 +01007#include <amdblocks/pci_devs.h>
8#include <device/pci_ops.h>
Fred Reitberger28908412022-11-01 10:49:16 -04009#include <soc/data_fabric.h>
Felix Held789f6f72021-02-13 01:09:28 +010010#include <soc/pci_devs.h>
Felix Helddba3fe72021-02-13 01:05:56 +010011#include <stdint.h>
12
13#define BROADCAST_FABRIC_ID 0xff
14
Felix Held9e0f9642023-06-16 16:28:14 +020015/* Index of IOAPIC resource associated with IOMMU */
Naresh Solanki4ef89f72023-05-25 17:37:50 +020016#define IOMMU_IOAPIC_IDX 0x20000120
17
Felix Held4e4dde42023-02-07 12:13:00 +010018#define DF_MMIO_REG_OFFSET(instance) ((instance) * DF_MMIO_REG_SET_SIZE * sizeof(uint32_t))
19
Felix Held985f3e02021-02-13 20:47:04 +010020/* The number of data fabric MMIO registers is SoC-specific */
Felix Held4e4dde42023-02-07 12:13:00 +010021#define DF_MMIO_BASE(reg) (D18F0_MMIO_BASE0 + DF_MMIO_REG_OFFSET(reg))
22#define DF_MMIO_LIMIT(reg) (D18F0_MMIO_LIMIT0 + DF_MMIO_REG_OFFSET(reg))
23#define DF_MMIO_CONTROL(reg) (D18F0_MMIO_CTRL0 + DF_MMIO_REG_OFFSET(reg))
Felix Held985f3e02021-02-13 20:47:04 +010024
Felix Held407bd582023-04-24 17:58:24 +020025/* Last 12GB of the usable address space are reserved */
26#define DF_RESERVED_TOP_12GB_MMIO_SIZE (12ULL * GiB)
27
Felix Held18a3c232023-08-03 00:10:03 +020028uint32_t data_fabric_read32(uint16_t fn_reg, uint8_t instance_id);
29void data_fabric_write32(uint16_t fn_reg, uint8_t instance_id, uint32_t data);
Felix Helddba3fe72021-02-13 01:05:56 +010030
Felix Held789f6f72021-02-13 01:09:28 +010031static __always_inline
Felix Held18a3c232023-08-03 00:10:03 +020032uint32_t data_fabric_broadcast_read32(uint16_t fn_reg)
Felix Held789f6f72021-02-13 01:09:28 +010033{
34 /* No bit masking required. Macros will apply mask to values. */
Felix Held18a3c232023-08-03 00:10:03 +020035 return pci_read_config32(_SOC_DEV(DF_DEV, DF_REG_FN(fn_reg)), DF_REG_OFFSET(fn_reg));
Felix Held789f6f72021-02-13 01:09:28 +010036}
37
38static __always_inline
Felix Held18a3c232023-08-03 00:10:03 +020039void data_fabric_broadcast_write32(uint16_t fn_reg, uint32_t data)
Felix Held789f6f72021-02-13 01:09:28 +010040{
41 /* No bit masking required. Macros will apply mask to values. */
Felix Held18a3c232023-08-03 00:10:03 +020042 pci_write_config32(_SOC_DEV(DF_DEV, DF_REG_FN(fn_reg)), DF_REG_OFFSET(fn_reg), data);
Felix Held789f6f72021-02-13 01:09:28 +010043}
44
Felix Held906f9be2021-02-13 20:38:08 +010045void data_fabric_print_mmio_conf(void);
Felix Held602f93e2021-02-13 21:10:08 +010046void data_fabric_disable_mmio_reg(unsigned int reg);
47int data_fabric_find_unused_mmio_reg(void);
Fred Reitberger31e62982022-10-31 14:18:20 -040048void data_fabric_set_mmio_np(void);
Felix Held602f93e2021-02-13 21:10:08 +010049
Felix Held407bd582023-04-24 17:58:24 +020050/* Inform the resource allocator about the usable IO and MMIO regions and PCI bus numbers */
51void amd_pci_domain_read_resources(struct device *domain);
52void amd_pci_domain_scan_bus(struct device *domain);
53
Felix Held7a5dd782023-04-28 22:47:33 +020054void amd_pci_domain_fill_ssdt(const struct device *domain);
55
Felix Helddba3fe72021-02-13 01:05:56 +010056#endif /* AMD_BLOCK_DATA_FABRIC_H */