blob: 399b166c3717465a4b444fb5c6cfded3bf3dcecb [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Stefan Reinauerdebb11f2008-10-29 04:46:52 +00003
4#include <console/console.h>
5#include <device/device.h>
6#include <device/pci.h>
7#include <device/pci_ids.h>
8#include "i82801gx.h"
Kyösti Mälkkie2227a22014-02-05 13:02:55 +02009#include <device/pci_ehci.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +020010#include <device/mmio.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020011#include <device/pci_ops.h>
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000012
13static void usb_ehci_init(struct device *dev)
14{
Stefan Reinauera8e11682009-03-11 14:54:18 +000015 struct resource *res;
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080016 u8 *base;
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000017 u32 reg32;
Stefan Reinauera8e11682009-03-11 14:54:18 +000018 u8 reg8;
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000019
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000020 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000021 reg32 = pci_read_config32(dev, PCI_COMMAND);
Stefan Reinauera8e11682009-03-11 14:54:18 +000022 reg32 |= PCI_COMMAND_MASTER;
23 reg32 |= PCI_COMMAND_SERR;
24 pci_write_config32(dev, PCI_COMMAND, reg32);
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000025
26 reg32 = pci_read_config32(dev, 0xdc);
27 reg32 |= (1 << 31) | (1 << 27);
28 pci_write_config32(dev, 0xdc, reg32);
29
30 reg32 = pci_read_config32(dev, 0xfc);
31 reg32 &= ~(3 << 2);
32 reg32 |= (2 << 2) | (1 << 29) | (1 << 17);
33 pci_write_config32(dev, 0xfc, reg32);
34
Stefan Reinauera8e11682009-03-11 14:54:18 +000035 /* Clear any pending port changes */
36 res = find_resource(dev, 0x10);
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080037 base = res2mmio(res, 0, 0);
Stefan Reinauerde3206a2010-02-22 06:09:43 +000038 reg32 = read32(base + 0x24) | (1 << 2);
39 write32(base + 0x24, reg32);
Stefan Reinauera8e11682009-03-11 14:54:18 +000040
41 /* workaround */
42 reg8 = pci_read_config8(dev, 0x84);
43 reg8 |= (1 << 4);
44 pci_write_config8(dev, 0x84, reg8);
45
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000046 printk(BIOS_DEBUG, "done.\n");
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000047}
48
Elyes HAOUAS99667032018-05-13 12:47:28 +020049static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor,
50 unsigned int device)
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000051{
52 u8 access_cntl;
53
54 access_cntl = pci_read_config8(dev, 0x80);
55
56 /* Enable writes to protected registers. */
57 pci_write_config8(dev, 0x80, access_cntl | 1);
58
Subrata Banik4a0f0712019-03-20 14:29:47 +053059 pci_dev_set_subsystem(dev, vendor, device);
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000060
61 /* Restore protection. */
62 pci_write_config8(dev, 0x80, access_cntl);
63}
64
65static struct pci_operations lops_pci = {
66 .set_subsystem = &usb_ehci_set_subsystem,
67};
68
69static struct device_operations usb_ehci_ops = {
Kyösti Mälkkifb387df2013-06-07 22:16:52 +030070 .read_resources = pci_ehci_read_resources,
71 .set_resources = pci_dev_set_resources,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000072 .enable_resources = pci_dev_enable_resources,
73 .init = usb_ehci_init,
74 .scan_bus = 0,
75 .enable = i82801gx_enable,
76 .ops_pci = &lops_pci,
77};
78
Uwe Hermannbddc6932008-10-29 13:51:31 +000079/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
80static const struct pci_driver i82801gx_usb_ehci __pci_driver = {
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000081 .ops = &usb_ehci_ops,
82 .vendor = PCI_VENDOR_ID_INTEL,
Uwe Hermann5d7a1c82008-10-31 18:41:09 +000083 .device = 0x27cc,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000084};