blob: 75640089981bdaa1546eba0cfb7b5739dcbfef47 [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03003
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03004#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03007#include <device/smbus.h>
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03008#include <cpu/x86/lapic.h>
9#include <arch/ioapic.h>
Elyes HAOUAS400f9ca2019-06-23 07:01:22 +020010
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030011#include "hudson.h"
12#include "smbus.c"
13
14#define NMI_OFF 0
15
16#define MAINBOARD_POWER_OFF 0
17#define MAINBOARD_POWER_ON 1
18
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030019/*
20* HUDSON enables all USB controllers by default in SMBUS Control.
21* HUDSON enables SATA by default in SMBUS Control.
22*/
23
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020024static void sm_init(struct device *dev)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030025{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080026 setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030027}
28
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020029static int lsmbus_recv_byte(struct device *dev)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030030{
31 u32 device;
32 struct resource *res;
33 struct bus *pbus;
34
35 device = dev->path.i2c.device;
36 pbus = get_pbus_smbus(dev);
37
38 res = find_resource(pbus->dev, 0x90);
39
40 return do_smbus_recv_byte(res->base, device);
41}
42
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020043static int lsmbus_send_byte(struct device *dev, u8 val)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030044{
45 u32 device;
46 struct resource *res;
47 struct bus *pbus;
48
49 device = dev->path.i2c.device;
50 pbus = get_pbus_smbus(dev);
51
52 res = find_resource(pbus->dev, 0x90);
53
54 return do_smbus_send_byte(res->base, device, val);
55}
56
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020057static int lsmbus_read_byte(struct device *dev, u8 address)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030058{
59 u32 device;
60 struct resource *res;
61 struct bus *pbus;
62
63 device = dev->path.i2c.device;
64 pbus = get_pbus_smbus(dev);
65
66 res = find_resource(pbus->dev, 0x90);
67
68 return do_smbus_read_byte(res->base, device, address);
69}
70
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020071static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030072{
73 u32 device;
74 struct resource *res;
75 struct bus *pbus;
76
77 device = dev->path.i2c.device;
78 pbus = get_pbus_smbus(dev);
79
80 res = find_resource(pbus->dev, 0x90);
81
82 return do_smbus_write_byte(res->base, device, address, val);
83}
84static struct smbus_bus_operations lops_smbus_bus = {
85 .recv_byte = lsmbus_recv_byte,
86 .send_byte = lsmbus_send_byte,
87 .read_byte = lsmbus_read_byte,
88 .write_byte = lsmbus_write_byte,
89};
90
Elyes HAOUASd9ef5462018-05-19 17:08:23 +020091static void hudson_sm_read_resources(struct device *dev)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030092{
93}
94
95static void hudson_sm_set_resources(struct device *dev)
96{
97}
98
99static struct pci_operations lops_pci = {
100 .set_subsystem = pci_dev_set_subsystem,
101};
102static struct device_operations smbus_ops = {
103 .read_resources = hudson_sm_read_resources,
104 .set_resources = hudson_sm_set_resources,
105 .enable_resources = pci_dev_enable_resources,
106 .init = sm_init,
Kyösti Mälkkid0e212c2015-02-26 20:47:47 +0200107 .scan_bus = scan_smbus,
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300108 .ops_pci = &lops_pci,
109 .ops_smbus_bus = &lops_smbus_bus,
110};
111static const struct pci_driver smbus_driver __pci_driver = {
112 .ops = &smbus_ops,
113 .vendor = PCI_VENDOR_ID_AMD,
Kyösti Mälkki9d9a5522016-11-19 22:14:59 +0200114 .device = PCI_DEVICE_ID_AMD_SB900_SM,
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300115};