Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 182dbdeac4b2489f8d03a47a79ab28ad556d9d21 / . / src / southbridge / amd / agesa / hudson / amd_pci_int_types.h
blob: 32a7d47d697d4cd63f78e403cd585ce655ca621a [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +0200[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Dave Frodin2093c4f2014-06-13 08:12:48 -0600[diff] [blame]3
4#ifndef AMD_PCI_INT_TYPES_H
5#define AMD_PCI_INT_TYPES_H
6
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]7#if CONFIG(SOUTHBRIDGE_AMD_AGESA_HUDSON)
Elyes HAOUAS251279c2018-07-08 12:41:56 +0200[diff] [blame]8const char *intr_types[] = {
Dave Frodin2093c4f2014-06-13 08:12:48 -0600[diff] [blame]9 [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
10 [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
11 [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "SD\t\t", "GEC\t", "PerMon\t",
12 [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t",
13 [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", "Dev20.5 INTC",
14 [0x40] = "IDE\t", "SATA\t",
15 [0x50] = "GPPInt0\t", "GPPInt1\t", "GPPInt2\t", "GPPInt3\t"
16};
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]17#elif CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE)
Elyes HAOUAS251279c2018-07-08 12:41:56 +0200[diff] [blame]18const char *intr_types[] = {
Dave Frodin2093c4f2014-06-13 08:12:48 -0600[diff] [blame]19 [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
20 [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
21 [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t",
22 [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t",
23 [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB",
24 [0x40] = "RSVD\t", "SATA\t",
25};
Dave Frodin2093c4f2014-06-13 08:12:48 -0600[diff] [blame]26#endif
27
28#endif /* AMD_PCI_INT_TYPES_H */