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review.coreboot.org / coreboot / 1659218d7c7e68beee752e701e4b7ba13369bcae / . / src / mainboard / google / brya / variants / uldren / gpio.c
blob: c0c438147e9c93d13013a2d959749dc6a04f1ad8 [file] [log] [blame]
Van Chen17cb21b2023-03-16 14:47:13 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3#include <baseboard/gpio.h>
4#include <baseboard/variants.h>
5#include <commonlib/helpers.h>
6#include <soc/gpio.h>
7
8/* Pad configuration in ramstage */
9static const struct pad_config override_gpio_table[] = {
10 /* A8 : WWAN_RF_DISABLE_ODL */
11 PAD_CFG_GPO(GPP_A8, 1, DEEP),
12 /* A20 : DDSP_HPD2 ==> NC */
13 PAD_NC(GPP_A20, NONE),
14 /* B5 : I2C2_SDA ==> NC */
15 PAD_NC(GPP_B5, NONE),
16 /* B6 : I2C2_SCL ==> NC */
17 PAD_NC(GPP_B6, NONE),
18 /* B15 : HP_RST_ODL */
19 PAD_CFG_GPO(GPP_B15, 1, DEEP),
Ian Fengb757a672023-04-28 13:32:16 +0800[diff] [blame]20 /* C1 : SMBDA==> TCHSCR_RST_L */
21 PAD_CFG_GPO(GPP_C1, 1, DEEP),
Van Chen17cb21b2023-03-16 14:47:13 +0800[diff] [blame]22 /* D6 : SRCCLKREQ1# ==> WWAN_EN */
23 PAD_CFG_GPO(GPP_D6, 1, DEEP),
Dtrain Hsu16592182023-06-05 10:00:41 +0800[diff] [blame^]24 /* D7 : SRCCLKREQ2# ==> NC */
25 PAD_NC(GPP_D7, NONE),
Van Chen17cb21b2023-03-16 14:47:13 +0800[diff] [blame]26 /* D8 : SRCCLKREQ3# ==> NC */
27 PAD_NC(GPP_D8, NONE),
28 /* D15 : ISH_UART0_RTS# ==> NC */
29 PAD_NC(GPP_D15, NONE),
30 /* D16 : ISH_UART0_CTS# ==> NC */
31 PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
32 /* D19 : I2S_MCLK1_OUT ==> NC */
33 PAD_NC(GPP_D19, NONE),
34 /* E20 : DDP2_CTRLCLK ==> NC */
35 PAD_NC(GPP_E20, NONE),
36 /* E21 : DDP2_CTRLDATA ==> NC */
37 PAD_NC(GPP_E21, NONE),
38 /* F12 : WWAN_RST_L */
39 PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
40 /* F13 : SOC_PEN_DETECT_R_ODL ==> NC*/
41 PAD_NC(GPP_F13, NONE),
42 /* F15 : SOC_PEN_DETECT_ODL ==> NC*/
43 PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
44 /* F18 : EC_IN_RW_OD ==> NC */
45 PAD_NC(GPP_F18, NONE),
46 /* H3 : WLAN_PCIE_WAKE_ODL ==> NC */
47 PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
48 /* H12 : UART0_RTS# ==> NC */
49 PAD_NC(GPP_H12, NONE),
50 /* H13 : UART0_CTS# ==> NC */
51 PAD_NC(GPP_H13, NONE),
52 /* H20 : WLAN_PERST_L ==> NC */
53 PAD_NC(GPP_H20, NONE),
54 /* H22 : IMGCLKOUT3 ==> NC */
55 PAD_NC(GPP_H22, NONE),
56};
57
58/* Early pad configuration in bootblock */
59static const struct pad_config early_gpio_table[] = {
60 /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
61 PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
62 /* B15 : HP_RST_ODL */
63 PAD_CFG_GPO(GPP_B15, 0, DEEP),
64 /* D6 : SRCCLKREQ1# ==> WWAN_EN */
65 PAD_CFG_GPO(GPP_D6, 1, DEEP),
66 /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
67 PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
68 /* F12 : GSXDOUT ==> WWAN_RST_L */
69 PAD_CFG_GPO(GPP_F12, 0, DEEP),
70 /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
71 PAD_CFG_GPI(GPP_F18, NONE, DEEP),
72 /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */
73 PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
74 /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */
75 PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
76 /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
77 PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
78 /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
79 PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
80};
81
82static const struct pad_config romstage_gpio_table[] = {
Ian Fengb757a672023-04-28 13:32:16 +0800[diff] [blame]83 /* Enable touchscreen, hold in reset */
84 /* C0 : SMBCLK ==> EN_PP3300_TCHSCR_X */
85 PAD_CFG_GPO(GPP_C0, 1, DEEP),
86 /* C1 : SMBDATA ==> TCHSCR_RST_L */
87 PAD_CFG_GPO(GPP_C1, 0, DEEP),
Van Chen17cb21b2023-03-16 14:47:13 +0800[diff] [blame]88};
89
90const struct pad_config *variant_gpio_override_table(size_t *num)
91{
92 *num = ARRAY_SIZE(override_gpio_table);
93 return override_gpio_table;
94}
95
96const struct pad_config *variant_early_gpio_table(size_t *num)
97{
98 *num = ARRAY_SIZE(early_gpio_table);
99 return early_gpio_table;
100}
101
102const struct pad_config *variant_romstage_gpio_table(size_t *num)
103{
104 *num = ARRAY_SIZE(romstage_gpio_table);
105 return romstage_gpio_table;
106}