blob: 00e7997819920cc0db5207d1529047a43178b5ae [file] [log] [blame]
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +05301FLASH 32M {
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +05302 SI_ALL 3712K {
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +05303 SI_DESC 4K
Reka Norman5013f7d2022-11-14 11:55:09 +11004 SI_ME
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +05305 }
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +05306 SI_BIOS 29056K {
7 RW_SECTION_A 4376K {
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +05308 VBLOCK_A 8K
9 FW_MAIN_A(CBFS)
10 RW_FWID_A 64
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053011 }
12 RW_LEGACY(CBFS) 1M
13 RW_MISC 152K {
14 UNIFIED_MRC_CACHE(PRESERVE) 128K {
15 RECOVERY_MRC_CACHE 64K
16 RW_MRC_CACHE 64K
17 }
18 RW_ELOG(PRESERVE) 4K
19 RW_SHARED 4K {
20 SHARED_DATA 4K
21 }
22 RW_VPD(PRESERVE) 8K
23 RW_NVRAM(PRESERVE) 8K
24 }
25 # RW UNUSED Region 1.
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +053026 RW_UNUSED_1 7120K
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053027 # This section starts at the 16M boundary in SPI flash.
28 # ADL does not support a region crossing this boundary,
29 # because the SPI flash is memory-mapped into two non-
30 # contiguous windows.
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +053031 RW_SECTION_B 4376K {
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053032 VBLOCK_B 8K
33 FW_MAIN_B(CBFS)
34 RW_FWID_B 64
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053035 }
36 # RW UNUSED Region 2.
Krishna P Bhat D1c6b02a2022-11-16 12:46:06 +053037 RW_UNUSED_2 7912K
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053038 # Make WP_RO region align with SPI vendor
39 # memory protected range specification.
40 WP_RO 4M {
41 RO_VPD(PRESERVE) 16K
Kangheui Wonc2b4f442022-05-05 15:28:21 +100042 RO_GSCVD 8K
Krishna Prasad Bhata1b9f9f2022-02-25 16:07:21 +053043 RO_SECTION {
44 FMAP 2K
45 RO_FRID 64
46 GBB@4K 12K
47 COREBOOT(CBFS)
48 }
49 }
50 }
51}