Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the LinuxBIOS project. |
| 3 | * |
| 4 | * Copyright (C) 2004 Tyan Computer |
| 5 | * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer. |
| 6 | * Copyright (C) 2006,2007 AMD |
| 7 | * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. |
| 8 | * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) |
| 9 | * Written by Morgan Tsai <my_tsai@sis.com> for SiS. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 24 | */ |
| 25 | |
| 26 | #include <console/console.h> |
| 27 | #include <device/device.h> |
| 28 | #include <device/pci.h> |
| 29 | #include <device/pci_ids.h> |
| 30 | #include <device/pci_ops.h> |
| 31 | #include <arch/io.h> |
| 32 | #include "sis966.h" |
| 33 | |
| 34 | uint8_t SiS_SiS5513_init[49][3]={ |
| 35 | {0x04, 0xFF, 0x05}, |
| 36 | {0x0D, 0xFF, 0x80}, |
| 37 | {0x2C, 0xFF, 0x39}, |
| 38 | {0x2D, 0xFF, 0x10}, |
| 39 | {0x2E, 0xFF, 0x13}, |
| 40 | {0x2F, 0xFF, 0x55}, |
| 41 | {0x50, 0xFF, 0xA2}, |
| 42 | {0x51, 0xFF, 0x21}, |
| 43 | {0x53, 0xFF, 0x21}, |
| 44 | {0x54, 0xFF, 0x2A}, |
| 45 | {0x55, 0xFF, 0x96}, |
| 46 | {0x52, 0xFF, 0xA2}, |
| 47 | {0x56, 0xFF, 0x81}, |
| 48 | {0x57, 0xFF, 0xC0}, |
| 49 | {0x60, 0xFF, 0xFB}, |
| 50 | {0x61, 0xFF, 0xAA}, |
| 51 | {0x62, 0xFF, 0xFB}, |
| 52 | {0x63, 0xFF, 0xAA}, |
| 53 | {0x81, 0xFF, 0xB3}, |
| 54 | {0x82, 0xFF, 0x72}, |
| 55 | {0x83, 0xFF, 0x40}, |
| 56 | {0x85, 0xFF, 0xB3}, |
| 57 | {0x86, 0xFF, 0x72}, |
| 58 | {0x87, 0xFF, 0x40}, |
| 59 | {0x94, 0xFF, 0xC0}, |
| 60 | {0x95, 0xFF, 0x08}, |
| 61 | {0x96, 0xFF, 0xC0}, |
| 62 | {0x97, 0xFF, 0x08}, |
| 63 | {0x98, 0xFF, 0xCC}, |
| 64 | {0x99, 0xFF, 0x04}, |
| 65 | {0x9A, 0xFF, 0x0C}, |
| 66 | {0x9B, 0xFF, 0x14}, |
| 67 | {0xA0, 0xFF, 0x11}, |
| 68 | {0x57, 0xFF, 0xD0}, |
| 69 | |
| 70 | {0xD8, 0xFE, 0x01}, // Com reset |
| 71 | {0xC8, 0xFE, 0x01}, |
| 72 | {0xC4, 0xFF, 0xFF}, // Clear status |
| 73 | {0xC5, 0xFF, 0xFF}, |
| 74 | {0xC6, 0xFF, 0xFF}, |
| 75 | {0xC7, 0xFF, 0xFF}, |
| 76 | {0xD4, 0xFF, 0xFF}, |
| 77 | {0xD5, 0xFF, 0xFF}, |
| 78 | {0xD6, 0xFF, 0xFF}, |
| 79 | {0xD7, 0xFF, 0xFF}, |
| 80 | |
| 81 | |
| 82 | {0x2C, 0xFF, 0x39}, // set subsystem ID |
| 83 | {0x2D, 0xFF, 0x10}, |
| 84 | {0x2E, 0xFF, 0x13}, |
| 85 | {0x2F, 0xFF, 0x55}, |
| 86 | |
| 87 | |
| 88 | {0x00, 0x00, 0x00} //End of table |
| 89 | }; |
| 90 | |
| 91 | static void ide_init(struct device *dev) |
| 92 | { |
| 93 | struct southbridge_sis_sis966_config *conf; |
| 94 | /* Enable ide devices so the linux ide driver will work */ |
| 95 | uint32_t dword; |
| 96 | uint16_t word; |
| 97 | uint8_t byte; |
| 98 | conf = dev->chip_info; |
| 99 | |
| 100 | |
| 101 | |
| 102 | printk_debug("ide_init:---------->\n"); |
| 103 | |
| 104 | |
| 105 | //-------------- enable IDE (SiS5513) ------------------------- |
| 106 | { |
| 107 | uint8_t temp8; |
| 108 | int i=0; |
| 109 | while(SiS_SiS5513_init[i][0] != 0) |
| 110 | { temp8 = pci_read_config8(dev, SiS_SiS5513_init[i][0]); |
| 111 | temp8 &= SiS_SiS5513_init[i][1]; |
| 112 | temp8 |= SiS_SiS5513_init[i][2]; |
| 113 | pci_write_config8(dev, SiS_SiS5513_init[i][0], temp8); |
| 114 | i++; |
| 115 | }; |
| 116 | } |
| 117 | //----------------------------------------------------------- |
| 118 | |
| 119 | word = pci_read_config16(dev, 0x50); |
| 120 | /* Ensure prefetch is disabled */ |
| 121 | word &= ~((1 << 15) | (1 << 13)); |
| 122 | if (conf->ide1_enable) { |
| 123 | /* Enable secondary ide interface */ |
| 124 | word |= (1<<0); |
| 125 | printk_debug("IDE1 \t"); |
| 126 | } |
| 127 | if (conf->ide0_enable) { |
| 128 | /* Enable primary ide interface */ |
| 129 | word |= (1<<1); |
| 130 | printk_debug("IDE0\n"); |
| 131 | } |
| 132 | |
| 133 | word |= (1<<12); |
| 134 | word |= (1<<14); |
| 135 | |
| 136 | pci_write_config16(dev, 0x50, word); |
| 137 | |
| 138 | |
| 139 | byte = 0x20 ; // Latency: 64-->32 |
| 140 | pci_write_config8(dev, 0xd, byte); |
| 141 | |
| 142 | dword = pci_read_config32(dev, 0xf8); |
| 143 | dword |= 12; |
| 144 | pci_write_config32(dev, 0xf8, dword); |
| 145 | #if CONFIG_PCI_ROM_RUN == 1 |
| 146 | pci_dev_init(dev); |
| 147 | #endif |
| 148 | |
| 149 | } |
| 150 | |
| 151 | static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 152 | { |
| 153 | pci_write_config32(dev, 0x40, |
| 154 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 155 | } |
| 156 | static struct pci_operations lops_pci = { |
| 157 | .set_subsystem = lpci_set_subsystem, |
| 158 | }; |
| 159 | |
| 160 | static struct device_operations ide_ops = { |
| 161 | .read_resources = pci_dev_read_resources, |
| 162 | .set_resources = pci_dev_set_resources, |
| 163 | .enable_resources = pci_dev_enable_resources, |
| 164 | .init = ide_init, |
| 165 | .scan_bus = 0, |
| 166 | // .enable = sis966_enable, |
| 167 | .ops_pci = &lops_pci, |
| 168 | }; |
| 169 | |
| 170 | static struct pci_driver ide_driver __pci_driver = { |
| 171 | .ops = &ide_ops, |
| 172 | .vendor = PCI_VENDOR_ID_SIS, |
| 173 | .device = PCI_DEVICE_ID_SIS_SIS966_IDE, |
| 174 | }; |
| 175 | |