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review.coreboot.org / coreboot / 14f72bc2cc2aa89d9e4cd6efcae3fcc46ea9b59b / . / util / inteltool / inteltool.8
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Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]1.TH INTELTOOL 8 "May 14, 2008"
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]2.SH NAME
3inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters
4.SH SYNOPSIS
Stefan Reinauerd466e6a2008-05-14 13:52:50 +0000[diff] [blame]5.B inteltool \fR[\fB\-vh?grpmedPMa\fR]
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]6.SH DESCRIPTION
7.B inteltool
8is a handy little tool for dumping the configuration space of Intel(R)
9CPUs, northbridges and southbridges.
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]10.sp
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]11This tool has been developed for the coreboot project (see
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]12.B http://coreboot.org
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]13for details on coreboot).
14.SH OPTIONS
15.TP
16.B "\-h, \-\-help"
17Show a help text and exit.
18.TP
19.B "\-v, \-\-version"
20Show version information and exit.
21.TP
22.B "\-a, \-\-all"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]23Dump all known I/O Controller Hub (ICH) southbridge, Intel(R) northbridge
24and Intel(R) Core CPU MSRs.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]25.TP
26.B "\-g, \-\-gpio"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]27Dump I/O Controller Hub (ICH) southbridge GPIO registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]28.TP
29.B "\-r, \-\-rcba"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]30Dump I/O Controller Hub (ICH) southbridge RCBA registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]31.TP
Alexander Couzensaa3dd5d2015-01-03 02:52:10 +0100[diff] [blame]32.B "\-s, \-\-spi"
33Dump I/O Controller Hub (ICH) southbridge SPI registers and bios control.
34.TP
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]35.B "\-p, \-\-pmbase"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]36Dump I/O Controller Hub (ICH) southbridge PMBASE registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]37.TP
38.B "\-m, \-\-mchbar"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]39Dump Intel(R) northbridge MCHBAR registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]40.TP
41.B "\-e, \-\-epbar"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]42Dump Intel(R) northbridge EPBAR registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]43.TP
44.B "\-d, \-\-dmibar"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]45Dump Intel(R) northbridge DMIBAR registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]46.TP
47.B "\-P, \-\-pciexbar"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]48Dump Intel(R) northbridge PCIEXBAR registers.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]49.TP
50.B "\-M, \-\-msrs"
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]51Dump Intel(R) CPU MSRs.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]52.SH BUGS
Martin Roth48a243b2014-12-07 22:25:02 -0700[diff] [blame]53Please report any bugs on the coreboot mailing list
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]54.RB "(" http://coreboot.org/Mailinglist ")."
55.SH LICENCE
56.B inteltool
Stefan Reinauer58a1cc12008-05-14 14:47:32 +0000[diff] [blame]57is covered by the GNU General Public License (GPL), version 2.
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]58.SH COPYRIGHT
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]59Copyright (C) 2008 coresystems GmbH
Stefan Reinauer03646be2008-05-13 22:14:21 +0000[diff] [blame]60.SH AUTHORS
61Stefan Reinauer <stepan@coresystems.de>
62.PP
63This manual page was written by Stefan Reinauer <stepan@coresystems.de>.
64It is licensed under the terms of the GNU GPL (version 2).
Uwe Hermann9a6b6b52008-05-14 21:20:55 +0000[diff] [blame]65.sp
66Intel(R) is a registered trademark of Intel Corporation. Other product
67and/or company names mentioned herein may be trademarks or registered
68trademarks of their respective owners.