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Felix Held3f3eca92020-01-23 17:12:32 +01001/* SPDX-License-Identifier: GPL-2.0-only */
Nico Huberae7c9682013-05-23 18:13:23 +02002
3/* =================== Generic PnP Device =================== */
4
5/*
6 * Generic setup for PnP devices.
7 *
8 * Controlled by the following preprocessor defines:
9 *
Elyes HAOUAS495bb662019-09-23 13:15:41 +020010 * SUPERIO_CHIP_NAME The name of the Super I/O chip (unique, required)
Samuel Hollandd2a86da2017-06-06 20:23:40 -050011 * SUPERIO_PNP_HID The EisaId string that identifies this device (optional)
Elyes HAOUAS495bb662019-09-23 13:15:41 +020012 * SUPERIO_PNP_LDN The logical device number on the Super I/O
Nico Huberae7c9682013-05-23 18:13:23 +020013 * chip for this device (required)
14 * SUPERIO_PNP_DDN A string literal that identifies the dos device
Elyes HAOUAS45808392020-03-30 16:43:34 +020015 * name (DDN) of this device (e.g. "COM1", optional)
Nico Huberae7c9682013-05-23 18:13:23 +020016 * SUPERIO_PNP_PM_REG Identifier of a 1-bit register to power down
17 * the logical device (optional)
Nico Huberdd94fa92013-07-01 16:29:16 +020018 * SUPERIO_PNP_PM_VAL The value for SUPERIO_PNP_PM_REG to power the logical
19 * device down (required if SUPERIO_PNP_PM_REG is defined)
Nico Huberae7c9682013-05-23 18:13:23 +020020 * SUPERIO_PNP_PM_LDN The logical device number to access the PM_REG
21 * bit (required if SUPERIO_PNP_PM_REG is defined)
22 * SUPERIO_PNP_IO0 The alignment and length of the first PnP i/o
Samuel Hollandeeef6452017-06-03 05:51:10 -050023 * resource (comma separated, e.g. `0x02, 0x08`,
Nico Huberae7c9682013-05-23 18:13:23 +020024 * optional)
25 * SUPERIO_PNP_IO1 The alignment and length of the second PnP i/o
Samuel Hollandeeef6452017-06-03 05:51:10 -050026 * resource (comma separated, e.g. `0x02, 0x08`,
27 * optional)
28 * SUPERIO_PNP_IO2 The alignment and length of the third PnP i/o
29 * resource (comma separated, e.g. `0x02, 0x08`,
Nico Huberae7c9682013-05-23 18:13:23 +020030 * optional)
31 * SUPERIO_PNP_IRQ0 If defined, the first PnP IRQ register is enabled
32 * SUPERIO_PNP_IRQ1 If defined, the second PnP IRQ register is enabled
33 * SUPERIO_PNP_DMA If defined, the PnP DMA register is enabled
34 */
35
36#include "pnp.asl"
37
38#ifndef SUPERIO_CHIP_NAME
39# error "SUPERIO_CHIP_NAME is not defined."
40#endif
41
42#ifndef SUPERIO_PNP_LDN
43# error "SUPERIO_PNP_LDN is not defined."
44#endif
45
46Device (SUPERIO_ID(PN, SUPERIO_PNP_LDN)) {
Samuel Hollandd2a86da2017-06-06 20:23:40 -050047 #ifdef SUPERIO_PNP_HID
48 Name (_HID, EisaId (SUPERIO_PNP_HID))
49 #else
Nico Huberae7c9682013-05-23 18:13:23 +020050 Name (_HID, EisaId ("PNP0c02")) /* TODO: Better fitting EisaId? */
Samuel Hollandd2a86da2017-06-06 20:23:40 -050051 #endif
Nico Huberae7c9682013-05-23 18:13:23 +020052 Name (_UID, SUPERIO_UID(PN, SUPERIO_PNP_LDN))
53 #ifdef SUPERIO_PNP_DDN
54 Name (_DDN, SUPERIO_PNP_DDN)
55 #endif
56
57 Method (_STA)
58 {
59 PNP_GENERIC_STA(SUPERIO_PNP_LDN)
60 }
61
62 Method (_DIS)
63 {
64 PNP_GENERIC_DIS(SUPERIO_PNP_LDN)
65 }
66
67#ifdef SUPERIO_PNP_PM_REG
68 Method (_PSC) {
Nico Huberdd94fa92013-07-01 16:29:16 +020069 PNP_GENERIC_PSC(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN)
Nico Huberae7c9682013-05-23 18:13:23 +020070 }
71
72 Method (_PS0) {
Nico Huberdd94fa92013-07-01 16:29:16 +020073 PNP_GENERIC_PS0(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN)
Nico Huberae7c9682013-05-23 18:13:23 +020074 }
75
Nico Huber79dfa902020-03-22 01:17:54 +010076 Method (_PS3) {
77 PNP_GENERIC_PS3(SUPERIO_PNP_PM_REG, SUPERIO_PNP_PM_VAL, SUPERIO_PNP_PM_LDN)
Nico Huberae7c9682013-05-23 18:13:23 +020078 }
79#else
80 Method (_PSC) {
81 PNP_DEFAULT_PSC
82 }
83#endif
84
Tristan Corrick8f731b82018-08-01 03:08:53 +120085 Method (_CRS, 0, Serialized)
Nico Huberae7c9682013-05-23 18:13:23 +020086 {
87 Name (CRS, ResourceTemplate () {
88#ifdef SUPERIO_PNP_IO0
89 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO0, IO0)
90#endif
91#ifdef SUPERIO_PNP_IO1
92 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1)
93#endif
Samuel Hollandeeef6452017-06-03 05:51:10 -050094#ifdef SUPERIO_PNP_IO2
95 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2)
96#endif
Nico Huberae7c9682013-05-23 18:13:23 +020097#ifdef SUPERIO_PNP_IRQ0
98 IRQNoFlags (IR0) {}
99#endif
100#ifdef SUPERIO_PNP_IRQ1
101 IRQNoFlags (IR1) {}
102#endif
103#ifdef SUPERIO_PNP_DMA
104 DMA (Compatibility, NotBusMaster, Transfer8, DM0) {}
105#endif
106 })
107 ENTER_CONFIG_MODE (SUPERIO_PNP_LDN)
108#ifdef SUPERIO_PNP_IO0
109 PNP_READ_IO(PNP_IO0, CRS, IO0)
110#endif
111#ifdef SUPERIO_PNP_IO1
112 PNP_READ_IO(PNP_IO1, CRS, IO1)
113#endif
Samuel Hollandeeef6452017-06-03 05:51:10 -0500114#ifdef SUPERIO_PNP_IO2
115 PNP_READ_IO(PNP_IO2, CRS, IO2)
116#endif
Nico Huberae7c9682013-05-23 18:13:23 +0200117#ifdef SUPERIO_PNP_IRQ0
118 PNP_READ_IRQ(PNP_IRQ0, CRS, IR0)
119#endif
120#ifdef SUPERIO_PNP_IRQ1
121 PNP_READ_IRQ(PNP_IRQ1, CRS, IR1)
122#endif
123#ifdef SUPERIO_PNP_DMA
124 PNP_READ_DMA(PNP_DMA0, CRS, DM0)
125#endif
126 EXIT_CONFIG_MODE ()
127 Return (CRS)
128 }
129
130 Method (_SRS, 1, Serialized)
131 {
132 Name (TMPL, ResourceTemplate () {
133#ifdef SUPERIO_PNP_IO0
134 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO0, IO0)
135#endif
136#ifdef SUPERIO_PNP_IO1
137 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1)
138#endif
Samuel Hollandeeef6452017-06-03 05:51:10 -0500139#ifdef SUPERIO_PNP_IO2
140 IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2)
141#endif
Nico Huberae7c9682013-05-23 18:13:23 +0200142#ifdef SUPERIO_PNP_IRQ0
143 IRQNoFlags (IR0) {}
144#endif
145#ifdef SUPERIO_PNP_IRQ1
146 IRQNoFlags (IR1) {}
147#endif
148#ifdef SUPERIO_PNP_DMA
149 DMA (Compatibility, NotBusMaster, Transfer8, DM0) {}
150#endif
151 })
152 ENTER_CONFIG_MODE (SUPERIO_PNP_LDN)
153#ifdef SUPERIO_PNP_IO0
154 PNP_WRITE_IO(PNP_IO0, Arg0, IO0)
155#endif
156#ifdef SUPERIO_PNP_IO1
157 PNP_WRITE_IO(PNP_IO1, Arg0, IO1)
158#endif
Samuel Hollandeeef6452017-06-03 05:51:10 -0500159#ifdef SUPERIO_PNP_IO2
160 PNP_WRITE_IO(PNP_IO2, Arg0, IO2)
161#endif
Nico Huberae7c9682013-05-23 18:13:23 +0200162#ifdef SUPERIO_PNP_IRQ0
163 PNP_WRITE_IRQ(PNP_IRQ0, Arg0, IR0)
164#endif
165#ifdef SUPERIO_PNP_IRQ1
166 PNP_WRITE_IRQ(PNP_IRQ1, Arg0, IR1)
167#endif
168#ifdef SUPERIO_PNP_DMA
169 PNP_WRITE_DMA(PNP_DMA0, Arg0, DM0)
170#endif
171 Store (One, PNP_DEVICE_ACTIVE)
172 EXIT_CONFIG_MODE ()
173 }
Arthur Heymans148fd992022-05-09 15:23:30 +0200174
175 /* This is used for _SRS. Since _DIS only disables the device
176 * without changing the resources this works.
177 */
178 Method (_PRS, 0)
179 {
180 return (_CRS)
181 }
Nico Huberae7c9682013-05-23 18:13:23 +0200182}