blob: 2c5b0c68d255d590b96fe8d335f4d80969dbb8d8 [file] [log] [blame]
Uwe Hermann1410c2d2007-05-29 10:37:52 +00001/*
2 * This file is part of the LinuxBIOS project.
3 *
4 * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <console/console.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include "i82371eb.h"
26
27/**
28 * Initialize the IDE controller.
29 *
30 * Depending on the configuration variables 'ide0_enable' and 'ide1_enable'
31 * we enable or disable the primary and secondary IDE interface, respectively.
32 *
33 * @param dev The device to use.
34 */
35static void ide_init(struct device *dev)
36{
37 uint16_t reg;
38 struct southbridge_intel_i82371eb_config *conf;
39
40 conf = dev->chip_info;
41
42 /* Enable/disable the primary IDE interface. */
43 reg = pci_read_config16(dev, IDETIM_PRI);
44 if (conf->ide0_enable) {
45 reg |= IDE_DECODE_ENABLE;
46 print_info("Primary IDE interface enabled\n");
47 } else {
48 reg &= ~(IDE_DECODE_ENABLE);
49 print_info("Primary IDE interface disabled\n");
50 }
51 pci_write_config16(dev, IDETIM_PRI, reg);
52
53 /* Enable/disable the secondary IDE interface. */
54 reg = pci_read_config16(dev, IDETIM_SEC);
55 if (conf->ide1_enable) {
56 reg |= IDE_DECODE_ENABLE;
57 print_info("Secondary IDE interface enabled\n");
58 } else {
59 reg &= ~(IDE_DECODE_ENABLE);
60 print_info("Secondary IDE interface disabled\n");
61 }
62 pci_write_config16(dev, IDETIM_SEC, reg);
63}
64
65/* There are no subsystem IDs on the Intel 82371EB. */
66static struct pci_operations lops_pci = {
67 // .set_subsystem = 0,
68};
69
70static struct device_operations ide_ops = {
71 .read_resources = pci_dev_read_resources,
72 .set_resources = pci_dev_set_resources,
73 .enable_resources = pci_dev_enable_resources,
74 .init = ide_init,
75 .scan_bus = 0,
76 .ops_pci = &lops_pci,
77};
78
79static struct pci_driver ide_driver __pci_driver = {
80 .ops = &ide_ops,
81 .vendor = PCI_VENDOR_ID_INTEL,
82 .device = PCI_DEVICE_ID_INTEL_82371AB_IDE,
83};