| Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 1 | #ifndef CPU_X86_MTRR_H |
| 2 | #define CPU_X86_MTRR_H |
| 3 | |
| 4 | |
| 5 | /* These are the region types */ |
| 6 | #define MTRR_TYPE_UNCACHEABLE 0 |
| 7 | #define MTRR_TYPE_WRCOMB 1 |
| 8 | /*#define MTRR_TYPE_ 2*/ |
| 9 | /*#define MTRR_TYPE_ 3*/ |
| 10 | #define MTRR_TYPE_WRTHROUGH 4 |
| 11 | #define MTRR_TYPE_WRPROT 5 |
| 12 | #define MTRR_TYPE_WRBACK 6 |
| 13 | #define MTRR_NUM_TYPES 7 |
| 14 | |
| 15 | #define MTRRcap_MSR 0x0fe |
| 16 | #define MTRRdefType_MSR 0x2ff |
| 17 | |
| 18 | #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) |
| 19 | #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) |
| 20 | |
| 21 | #define NUM_FIXED_RANGES 88 |
| 22 | #define MTRRfix64K_00000_MSR 0x250 |
| 23 | #define MTRRfix16K_80000_MSR 0x258 |
| 24 | #define MTRRfix16K_A0000_MSR 0x259 |
| 25 | #define MTRRfix4K_C0000_MSR 0x268 |
| 26 | #define MTRRfix4K_C8000_MSR 0x269 |
| 27 | #define MTRRfix4K_D0000_MSR 0x26a |
| 28 | #define MTRRfix4K_D8000_MSR 0x26b |
| 29 | #define MTRRfix4K_E0000_MSR 0x26c |
| 30 | #define MTRRfix4K_E8000_MSR 0x26d |
| 31 | #define MTRRfix4K_F0000_MSR 0x26e |
| 32 | #define MTRRfix4K_F8000_MSR 0x26f |
| 33 | |
| 34 | |
| arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 35 | #if !defined(__ROMCC__) && !defined (ASSEMBLY) |
| Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 36 | |
| Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame^] | 37 | |
| 38 | void x86_setup_var_mtrrs(unsigned address_bits); |
| 39 | void x86_setup_mtrrs(unsigned address_bits); |
| Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 40 | int x86_mtrr_check(void); |
| 41 | |
| 42 | #endif /* __ROMCC__ */ |
| 43 | |
| 44 | |
| 45 | #endif /* CPU_X86_MTRR_H */ |