blob: 1d1e52baafbf1144759b7e5684c813a2685b4535 [file] [log] [blame]
Dave Frodin2093c4f2014-06-13 08:12:48 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Sage Electronic Engineering, LLC.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#ifndef AMD_PCI_UTIL_H
21#define AMD_PCI_UTIL_H
22
23#include <stdint.h>
24#include "amd_pci_int_defs.h"
25
26/* FCH index/data registers */
27#define PCI_INTR_INDEX 0xc00
28#define PCI_INTR_DATA 0xc01
29
30#ifndef __PRE_RAM__
31
32struct pirq_struct {
33 u8 devfn;
34 u8 PIN[4]; /* PINA/B/C/D are index 0/1/2/3 */
35};
36
37extern const struct pirq_struct * pirq_data_ptr;
38extern u32 pirq_data_size;
39extern const u8 * intr_data_ptr;
40extern const u8 * picr_data_ptr;
41
42u8 read_pci_int_idx(u8 index, int mode);
43void write_pci_int_idx(u8 index, int mode, u8 data);
44void write_pci_cfg_irqs(void);
45void write_pci_int_table (void);
46#endif /* __PRE_RAM */
47
48#endif /* AMD_PCI_UTIL_H */