src/mainboard/google/skyrim/variants/winterhold/overridetree.cb

# SPDX-License-Identifier: GPL-2.0-or-later

chip soc/amd/mendocino

	# Set DPTC multi-profile common parameters

	# Refer the spec "FT6 Infrastructure Roadmap"#57316
	# Set system_configuration to 4 for 15W
	register "system_configuration" = "4"
	register "thermctl_limit_degreeC" = "97"

	register "stt_control" = "1"
	register "stt_pcb_sensor_count" = "2"
	register "stt_alpha_apu" = "0x199A"
	register "stt_error_coeff" = "0x21"
	register "stt_error_rate_coefficient" = "0xCCD"

	# These registers are defined in AMD DevHub document #57316.
	# Normal
	register "vrm_current_limit_mA"                  = "28000"
	register "vrm_maximum_current_limit_mA"          = "50000"
	register "vrm_soc_current_limit_mA"              = "10000"
	# Throttle (e.g., Low/No Battery)
	register "vrm_current_limit_throttle_mA"         = "20000"
	register "vrm_maximum_current_limit_throttle_mA" = "20000"
	register "vrm_soc_current_limit_throttle_mA"     = "10000"

	# Set Dynamic DPTC thermal profile Table A (Default)
	register "fast_ppt_limit_mW" = "30000"
	register "slow_ppt_limit_mW" = "18000"
	register "slow_ppt_time_constant_s" = "7"
	register "sustained_power_limit_mW" = "15000"

	register "stt_min_limit" = "7000"
	register "stt_m1" = "0x148"
	register "stt_m2" = "0x38F"
	register "stt_c_apu" = "0xDF9A"
	register "stt_skin_temp_apu" = "0x3200"

	# Set Dynamic DPTC thermal profile confiuration. Table B
	register "fast_ppt_limit_mW_B" = "20000"
	register "slow_ppt_limit_mW_B" = "13000"
	register "slow_ppt_time_constant_s_B" = "5"
	register "sustained_power_limit_mW_B" = "10000"

	register "stt_min_limit_B" = "5000"
	register "stt_m1_B" = "0x11F"
	register "stt_m2_B" = "0x3AE"
	register "stt_c_apu_B" = "0xE19A"
	register "stt_skin_temp_apu_B" = "0x3400"

	# Set Dynamic DPTC thermal profile confiuration. Table C
	register "fast_ppt_limit_mW_C" = "30000"
	register "slow_ppt_limit_mW_C" = "22000"
	register "slow_ppt_time_constant_s_C" = "10"
	register "sustained_power_limit_mW_C" = "15000"

	register "stt_min_limit_C" = "10000"
	register "stt_m1_C" = "0x1A4"
	register "stt_m2_C" = "0x2E1"
	register "stt_c_apu_C" = "0xDACD"
	register "stt_skin_temp_apu_C" = "0x3600"

	# Set Dynamic DPTC thermal profile confiuration. Table D
	register "fast_ppt_limit_mW_D" = "25000"
	register "slow_ppt_limit_mW_D" = "15000"
	register "slow_ppt_time_constant_s_D" = "8"
	register "sustained_power_limit_mW_D" = "10000"

	register "stt_min_limit_D" = "8000"
	register "stt_m1_D" = "0x1C3"
	register "stt_m2_D" = "0x2BB"
	register "stt_c_apu_D" = "0xDE00"
	register "stt_skin_temp_apu_D" = "0x3800"

	# Set Dynamic DPTC thermal profile confiuration. Table E
	register "fast_ppt_limit_mW_E" = "22000"
	register "slow_ppt_limit_mW_E" = "15000"
	register "slow_ppt_time_constant_s_E" = "4"
	register "sustained_power_limit_mW_E" = "12000"

	register "stt_min_limit_E" = "7000"
	register "stt_m1_E" = "0x114"
	register "stt_m2_E" = "0x371"
	register "stt_c_apu_E" = "0xE333"
	register "stt_skin_temp_apu_E" = "0x3000"


	# Set Dynamic DPTC thermal profile confiuration. Table F
	register "fast_ppt_limit_mW_F" = "18000"
	register "slow_ppt_limit_mW_F" = "12000"
	register "slow_ppt_time_constant_s_F" = "2"
	register "sustained_power_limit_mW_F" = "9000"

	register "stt_min_limit_F" = "5000"
	register "stt_m1_F" = "0x15C"
	register "stt_m2_F" = "0x33D"
	register "stt_c_apu_F" = "0xE866"
	register "stt_skin_temp_apu_F" = "0x3200"

	device domain 0 on
		device ref gpp_bridge_1 on
			# Required so the NVMe gets placed into D3 when entering S0i3.
			chip drivers/pcie/rtd3/device
				register "name" = ""NVME""
				device pci 00.0 on end
			end
		end # eMMC
		device ref gpp_bridge_2 on
			# Required so the NVMe gets placed into D3 when entering S0i3.
			chip drivers/pcie/rtd3/device
				register "name" = ""NVME""
				device pci 00.0 on end
			end
		end # NVMe

		device ref gpp_bridge_a on  # Internal GPP Bridge 0 to Bus A
			device ref xhci_1 on # XHCI1 controller
				chip drivers/usb/acpi
					device ref xhci_1_root_hub on # XHCI1 root hub
						chip drivers/usb/acpi
							device ref usb3_port3 on # USB 3.1 port3
								chip drivers/usb/hub
									register "desc" = ""USB Hub""
									register "name" = ""VL822""
									register "port_count" = "4"
									device usb 0.0 on # VL822 USB3 hub
										chip drivers/usb/acpi
											register "desc" = ""USB3 Type-A Port A0 (DB)""
											register "type" = "UPC_TYPE_USB3_A"
											register "use_custom_pld" = "true"
											register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
											device usb 3.0 on end
										end
										chip drivers/usb/acpi
											register "desc" = ""WWAN""
											register "type" = "UPC_TYPE_INTERNAL"
											register "group" = "ACPI_PLD_GROUP(2, 2)"
											register "has_power_resource" = "1"
											register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_42)"
											register "reset_off_delay_ms" = "20"
											register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_8)"
											register "enable_delay_ms" = "20"
											device usb 3.1 on end
										end
									end # VL822 USB3 hub
								end
							end # USB 3.1 port3
						end
						chip drivers/usb/acpi
							device ref usb2_port3 on # USB 2 port3
								chip drivers/usb/hub
									register "desc" = ""USB Hub""
									register "name" = ""VL822""
									register "port_count" = "4"
									device usb 0.0 on # VL822 USB2 hub
										chip drivers/usb/acpi
											register "desc" = ""USB2 Type-A Port A0 (DB)""
											register "type" = "UPC_TYPE_USB3_A"
											register "use_custom_pld" = "true"
											register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
											device usb 2.0 on end
										end
										chip drivers/usb/acpi
											register "desc" = ""WWAN""
											register "type" = "UPC_TYPE_INTERNAL"
											register "group" = "ACPI_PLD_GROUP(2, 2)"
											device usb 2.1 on end
										end
									end # VL822 USB2 hub
								end
							end # USB 2 port3
						end
					end # XHCI1 root hub
				end
			end # XHCI1 controller
		end # Internal GPP Bridge 0 to Bus A
	end # domain

	device ref i2c_0 on
		chip drivers/i2c/generic
			register "hid" = ""ELAN0000""
			register "desc" = ""ELAN Touchpad""
			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)"
			register "wake" = "GEVENT_20"
			register "detect" = "1"
			device i2c 15 on end
		end
		chip drivers/i2c/hid
			register "generic.hid" = ""GXTP7863""
			register "generic.desc" = ""Goodix Touchpad""
			register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)"
			register "generic.wake" = "GEVENT_20"
			register "generic.detect" = "1"
			register "hid_desc_reg_offset" = "0x20"
			device i2c 2c on end
		end
	end # I2C0
	device ref i2c_1 on
		chip drivers/i2c/hid
			register "generic.hid" = ""ELAN900C""
			register "generic.desc" = ""ELAN Touchscreen""
			register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_29)"
			register "generic.detect" = "1"
			register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)"
			register "generic.enable_delay_ms" = "10"
			register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)"
			register "generic.reset_off_delay_ms" = "1"
			register "generic.reset_delay_ms" = "10"
			register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
			register "generic.stop_delay_ms" = "180"
			register "generic.stop_off_delay_ms" = "1"
			register "generic.has_power_resource" = "1"
			register "hid_desc_reg_offset" = "0x01"
			device i2c 10 on end
		end
		chip drivers/i2c/generic
			register "hid" = ""MLFS0000""
			register "desc" = ""Melfas Touchscreen""
			register "detect" = "1"
			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_29)"
			register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)"
			register "enable_delay_ms" = "1"
			register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)"
			register "reset_delay_ms" = "20"
			register "reset_off_delay_ms" = "2"
			register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
			register "stop_off_delay_ms" = "2"
			register "has_power_resource" = "1"
			register "disable_gpio_export_in_crs" = "1"
			device i2c 34 on end
		end
		chip drivers/generic/gpio_keys
			register "name" = ""PENH""
			register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_3)"
			register "key.dev_name" = ""EJCT""
			register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
			register "key.linux_code" = "SW_PEN_INSERTED"
			register "key.linux_input_type" = "EV_SW"
			register "key.label" = ""pen_eject""
			register "key.debounce_interval" = "100"
			register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
			device generic 0 on end
		end
	end # I2C1
	device ref i2c_2 on
		chip drivers/i2c/generic
			register "hid" = ""RTL5682""
			register "name" = ""RT58""
			register "desc" = ""Realtek RT5682""
			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)"
			register "property_count" = "1"
			register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
			register "property_list[0].name" = ""realtek,jd-src""
			register "property_list[0].integer" = "1"
			device i2c 1a on end
		end
		chip drivers/i2c/generic
			register "hid" = ""10EC1019""
			register "desc" = ""Realtek SPK AMP R""
			register "uid" = "1"
			device i2c 29 on end
		end
		chip drivers/i2c/generic
			register "hid" = ""10EC1019""
			register "desc" = ""Realtek SPK AMP L""
			register "uid" = "2"
			register "probed" = "1"
			device i2c 2a on end
		end
	end # I2C2

	device ref uart_1 on
		chip drivers/uart/acpi
			register "name" = ""CRFP""
			register "desc" = ""Fingerprint Reader""
			register "hid" = "ACPI_DT_NAMESPACE_HID"
			register "compat_string" = ""google,cros-ec-uart""
			register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_24)"
			register "wake" = "GEVENT_15"
			register "uart" = "ACPI_UART_RAW_DEVICE(3000000, 64)"
			register "has_power_resource" = "1"
			register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)"
			register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)"
			register "enable_delay_ms" = "3"
			device generic 0 alias fpmcu on end
		end
	end # UART1

end	# chip soc/amd/mendocino