blob: a43ef259aa9d386af91d9bfe78f45ac577212fc2 [file] [log] [blame]
Stefan Reinauer30140a52009-03-11 16:20:39 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <device/pci_ids.h>
24
25static void gma_func0_init(struct device *dev)
26{
27 u32 reg32;
28
29 /* IGD needs to be Bus Master */
30 reg32 = pci_read_config32(dev, PCI_COMMAND);
31 pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
32
33 pci_dev_init(dev);
34}
35
36static void gma_func1_init(struct device *dev)
37{
38 u32 reg32;
39
40 /* IGD needs to be Bus Master, also enable IO accesss */
41 reg32 = pci_read_config32(dev, PCI_COMMAND);
Stefan Reinauer109ab312009-08-12 16:08:05 +000042 pci_write_config32(dev, PCI_COMMAND, reg32 |
Stefan Reinauer30140a52009-03-11 16:20:39 +000043 PCI_COMMAND_MASTER | PCI_COMMAND_IO);
44}
45
46static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
47{
48 if (!vendor || !device) {
49 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
50 pci_read_config32(dev, PCI_VENDOR_ID));
51 } else {
52 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
53 ((device & 0xffff) << 16) | (vendor & 0xffff));
54 }
55}
56
57static struct pci_operations gma_pci_ops = {
58 .set_subsystem = gma_set_subsystem,
59};
60
61static struct device_operations gma_func0_ops = {
62 .read_resources = pci_dev_read_resources,
63 .set_resources = pci_dev_set_resources,
64 .enable_resources = pci_dev_enable_resources,
65 .init = gma_func0_init,
66 .scan_bus = 0,
67 .enable = 0,
68 .ops_pci = &gma_pci_ops,
69};
70
71
72static struct device_operations gma_func1_ops = {
73 .read_resources = pci_dev_read_resources,
74 .set_resources = pci_dev_set_resources,
75 .enable_resources = pci_dev_enable_resources,
76 .init = gma_func1_init,
77 .scan_bus = 0,
78 .enable = 0,
79 .ops_pci = &gma_pci_ops,
80};
81
82static const struct pci_driver i945_gma_func0_driver __pci_driver = {
83 .ops = &gma_func0_ops,
84 .vendor = PCI_VENDOR_ID_INTEL,
85 .device = 0x27a2,
86};
87
88static const struct pci_driver i945_gma_func1_driver __pci_driver = {
89 .ops = &gma_func1_ops,
90 .vendor = PCI_VENDOR_ID_INTEL,
91 .device = 0x27a6,
92};
93