Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2016 - 2017 Intel Corp. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 17 | #include <bootblock_common.h> |
| 18 | #include <cpu/x86/mtrr.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <FsptUpd.h> |
| 21 | #include <intelblocks/fast_spi.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 22 | #include <soc/bootblock.h> |
| 23 | #include <soc/iomap.h> |
| 24 | #include <spi-generic.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 25 | #include <console/console.h> |
| 26 | |
| 27 | const FSPT_UPD temp_ram_init_params = { |
| 28 | .FspUpdHeader = { |
| 29 | .Signature = 0x545F445055564E44ULL, |
| 30 | .Revision = 1, |
| 31 | .Reserved = {0}, |
| 32 | }, |
| 33 | .FsptCoreUpd = { |
| 34 | .MicrocodeRegionBase = |
| 35 | (UINT32)CONFIG_CPU_MICROCODE_CBFS_LOC, |
| 36 | .MicrocodeRegionLength = |
| 37 | (UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN, |
| 38 | .CodeRegionBase = |
Arthur Heymans | 62c0b61 | 2019-02-05 21:10:01 +0100 | [diff] [blame] | 39 | (UINT32)(0x100000000ULL - CONFIG_ROM_SIZE), |
| 40 | .CodeRegionLength = (UINT32)CONFIG_ROM_SIZE, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 41 | .Reserved1 = {0}, |
| 42 | }, |
| 43 | .FsptConfig = { |
| 44 | .PcdFsptPort80RouteDisable = 0, |
| 45 | .ReservedTempRamInitUpd = {0}, |
| 46 | }, |
| 47 | .UnusedUpdSpace0 = {0}, |
| 48 | .UpdTerminator = 0x55AA, |
| 49 | }; |
| 50 | |
| 51 | asmlinkage void bootblock_c_entry(uint64_t base_timestamp) |
| 52 | { |
| 53 | /* Call lib/bootblock.c main */ |
Kyösti Mälkki | 101ef0b | 2019-08-18 06:58:42 +0300 | [diff] [blame^] | 54 | bootblock_main_with_basetime(base_timestamp); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 55 | }; |
| 56 | |
| 57 | void bootblock_soc_early_init(void) |
| 58 | { |
| 59 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 60 | #if (CONFIG(CONSOLE_SERIAL)) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 61 | early_uart_init(); |
| 62 | #endif |
| 63 | }; |
| 64 | |
| 65 | void bootblock_soc_init(void) |
| 66 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 67 | if (CONFIG(BOOTBLOCK_CONSOLE)) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 68 | printk(BIOS_DEBUG, "FSP TempRamInit successful...\n"); |
| 69 | }; |