Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 2 | |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 3 | #include <device/device.h> |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 4 | #include <device/pci_def.h> |
Richard Spiegel | 0ad74ac | 2017-12-08 16:53:29 -0700 | [diff] [blame] | 5 | #include <amdblocks/BiosCallOuts.h> |
Elyes HAOUAS | 20eaef0 | 2019-03-29 17:45:28 +0100 | [diff] [blame] | 6 | #include <console/console.h> |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 7 | #include <soc/southbridge.h> |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 8 | #include <soc/pci_devs.h> |
Richard Spiegel | 0ad74ac | 2017-12-08 16:53:29 -0700 | [diff] [blame] | 9 | #include <amdblocks/agesawrapper.h> |
Marc Jones | afd03d8 | 2017-11-16 10:01:08 -0700 | [diff] [blame] | 10 | #include <amdblocks/dimm_spd.h> |
Richard Spiegel | a9f4936 | 2018-03-05 08:11:50 -0700 | [diff] [blame] | 11 | #include <amdblocks/car.h> |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 12 | |
Elyes HAOUAS | 20eaef0 | 2019-03-29 17:45:28 +0100 | [diff] [blame] | 13 | #include "chip.h" |
| 14 | |
Richard Spiegel | 271b8a5 | 2018-11-06 16:32:28 -0700 | [diff] [blame] | 15 | void __weak platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset) {} |
Richard Spiegel | d1a44a1 | 2017-12-26 08:26:31 -0700 | [diff] [blame] | 16 | |
Richard Spiegel | 271b8a5 | 2018-11-06 16:32:28 -0700 | [diff] [blame] | 17 | AGESA_STATUS agesa_fch_initreset(uint32_t Func, uintptr_t FchData, |
| 18 | void *ConfigPtr) |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 19 | { |
| 20 | AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; |
| 21 | |
| 22 | if (StdHeader->Func == AMD_INIT_RESET) { |
| 23 | FCH_RESET_DATA_BLOCK *FchParams_reset; |
| 24 | FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; |
| 25 | printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 26 | |
| 27 | /* Get platform specific configuration changes */ |
| 28 | platform_FchParams_reset(FchParams_reset); |
| 29 | |
| 30 | printk(BIOS_DEBUG, "Done\n"); |
| 31 | } |
| 32 | |
| 33 | return AGESA_SUCCESS; |
| 34 | } |
| 35 | |
Richard Spiegel | 271b8a5 | 2018-11-06 16:32:28 -0700 | [diff] [blame] | 36 | AGESA_STATUS agesa_fch_initenv(uint32_t Func, uintptr_t FchData, |
| 37 | void *ConfigPtr) |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 38 | { |
| 39 | AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; |
| 40 | |
| 41 | if (StdHeader->Func == AMD_INIT_ENV) { |
| 42 | FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; |
| 43 | printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); |
| 44 | |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 45 | /* XHCI configuration */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 46 | if (CONFIG(STONEYRIDGE_XHCI_ENABLE)) |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 47 | FchParams_env->Usb.Xhci0Enable = TRUE; |
| 48 | else |
| 49 | FchParams_env->Usb.Xhci0Enable = FALSE; |
| 50 | FchParams_env->Usb.Xhci1Enable = FALSE; |
| 51 | |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 52 | /* SATA configuration */ |
| 53 | FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; |
Felix Held | 727ee667 | 2023-12-20 22:47:03 +0100 | [diff] [blame] | 54 | if (is_dev_enabled(DEV_PTR(sata))) { |
Richard Spiegel | bb18b43 | 2018-08-03 10:37:28 -0700 | [diff] [blame] | 55 | switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) { |
| 56 | case SataRaid: |
| 57 | case SataAhci: |
| 58 | case SataAhci7804: |
| 59 | case SataLegacyIde: |
| 60 | FchParams_env->Sata.SataIdeMode = FALSE; |
| 61 | break; |
| 62 | case SataIde2Ahci: |
| 63 | case SataIde2Ahci7804: |
| 64 | default: /* SataNativeIde */ |
| 65 | FchParams_env->Sata.SataIdeMode = TRUE; |
| 66 | break; |
| 67 | } |
Felix Held | fe40af9 | 2023-12-20 22:48:49 +0100 | [diff] [blame] | 68 | } else { |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 69 | FchParams_env->Sata.SataIdeMode = FALSE; |
Felix Held | fe40af9 | 2023-12-20 22:48:49 +0100 | [diff] [blame] | 70 | } |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 71 | |
| 72 | /* Platform updates */ |
| 73 | platform_FchParams_env(FchParams_env); |
| 74 | |
| 75 | printk(BIOS_DEBUG, "Done\n"); |
| 76 | } |
| 77 | |
| 78 | return AGESA_SUCCESS; |
| 79 | } |
| 80 | |
Richard Spiegel | 271b8a5 | 2018-11-06 16:32:28 -0700 | [diff] [blame] | 81 | AGESA_STATUS agesa_ReadSpd(uint32_t Func, uintptr_t Data, void *ConfigPtr) |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 82 | { |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 83 | uint8_t spd_address; |
| 84 | int err; |
| 85 | DEVTREE_CONST struct device *dev; |
| 86 | DEVTREE_CONST struct soc_amd_stoneyridge_config *conf; |
| 87 | AGESA_READ_SPD_PARAMS *info = ConfigPtr; |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 88 | |
Kyösti Mälkki | 11cac78 | 2022-04-07 07:16:48 +0300 | [diff] [blame] | 89 | if (!ENV_RAMINIT) |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 90 | return AGESA_UNSUPPORTED; |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 91 | |
Kyösti Mälkki | e737755 | 2018-06-21 16:20:55 +0300 | [diff] [blame] | 92 | dev = pcidev_path_on_root(DCT_DEVFN); |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 93 | if (dev == NULL) |
| 94 | return AGESA_ERROR; |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 95 | |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 96 | conf = dev->chip_info; |
| 97 | if (conf == NULL) |
| 98 | return AGESA_ERROR; |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 99 | |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 100 | if (info->SocketId >= ARRAY_SIZE(conf->spd_addr_lookup)) |
| 101 | return AGESA_ERROR; |
| 102 | if (info->MemChannelId >= ARRAY_SIZE(conf->spd_addr_lookup[0])) |
| 103 | return AGESA_ERROR; |
| 104 | if (info->DimmId >= ARRAY_SIZE(conf->spd_addr_lookup[0][0])) |
| 105 | return AGESA_ERROR; |
| 106 | |
| 107 | spd_address = conf->spd_addr_lookup |
| 108 | [info->SocketId][info->MemChannelId][info->DimmId]; |
| 109 | if (spd_address == 0) |
| 110 | return AGESA_ERROR; |
| 111 | |
| 112 | err = mainboard_read_spd(spd_address, (void *)info->Buffer, |
| 113 | CONFIG_DIMM_SPD_SIZE); |
| 114 | |
| 115 | /* Read the SPD if the mainboard didn't fill the buffer */ |
| 116 | if (err || (*info->Buffer == 0)) |
| 117 | err = sb_read_spd(spd_address, (void *)info->Buffer, |
| 118 | CONFIG_DIMM_SPD_SIZE); |
| 119 | |
| 120 | if (err) |
| 121 | return AGESA_ERROR; |
| 122 | |
| 123 | return AGESA_SUCCESS; |
| 124 | } |
| 125 | |
Richard Spiegel | 271b8a5 | 2018-11-06 16:32:28 -0700 | [diff] [blame] | 126 | AGESA_STATUS agesa_HaltThisAp(uint32_t Func, uintptr_t Data, void *ConfigPtr) |
Richard Spiegel | a9f4936 | 2018-03-05 08:11:50 -0700 | [diff] [blame] | 127 | { |
| 128 | AGESA_HALT_THIS_AP_PARAMS *info = ConfigPtr; |
| 129 | uint32_t flags = 0; |
| 130 | |
| 131 | if (info->PrimaryCore == TRUE) |
| 132 | return AGESA_UNSUPPORTED; /* force normal path */ |
| 133 | if (info->ExecWbinvd == TRUE) |
| 134 | flags |= 1; |
| 135 | if (info->CacheEn == TRUE) |
| 136 | flags |= 2; |
| 137 | |
| 138 | ap_teardown_car(flags); /* does not return */ |
| 139 | |
| 140 | /* Should never reach here */ |
| 141 | return AGESA_UNSUPPORTED; |
| 142 | } |
| 143 | |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 144 | /* Allow mainboards to fill the SPD buffer */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 145 | __weak int mainboard_read_spd(uint8_t spdAddress, char *buf, |
Marc Jones | a9f7277 | 2017-11-16 18:47:36 -0700 | [diff] [blame] | 146 | size_t len) |
| 147 | { |
| 148 | printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |
| 149 | return -1; /* SPD not read */ |
Martin Roth | c450fbe | 2017-10-02 13:46:50 -0600 | [diff] [blame] | 150 | } |