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review.coreboot.org / coreboot / 0d19289e840f9c711f50a74437d1b3856222db03 / . / src / mainboard / intel / d945gclf / irq_tables.c
blob: 4e1f6b9f18ed599c98dc8c7a3d161d5e54b58953 [file] [log] [blame]
Angel Pons60ec3652020-04-03 01:22:13 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]2
3#include <arch/pirq_routing.h>
4
Stefan Reinauera47bd912012-11-15 15:15:15 -0800[diff] [blame]5static const struct irq_routing_table intel_irq_routing_table = {
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]6 PIRQ_SIGNATURE, /* u32 signature */
7 PIRQ_VERSION, /* u16 version */
8 32+16*18, /* There can be total 18 devices on the bus */
9 0x00, /* Where the interrupt router lies (bus) */
Elyes HAOUAS531b87a2016-09-19 09:46:33 -0600[diff] [blame]10 (0x1f << 3)|0x0, /* Where the interrupt router lies (dev) */
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]11 0, /* IRQs devoted exclusively to PCI usage */
12 0x8086, /* Vendor */
13 0x27b0, /* Device */
14 0, /* miniport */
15 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
16 0xf, /* u8 checksum. */
Patrick Georgi71555952021-02-11 14:40:01 +0100[diff] [blame]17 /* clang-format off */
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]18 {
Elyes HAOUAS531b87a2016-09-19 09:46:33 -0600[diff] [blame]19 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
20 {0x00,(0x01 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe?
21 {0x00,(0x02 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA
22 {0x00,(0x1e << 3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge
23 {0x00,(0x1f << 3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC
24 {0x00,(0x1d << 3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1
25 {0x00,(0x1b << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device
26 {0x00,(0x1c << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge
27 {0x04,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire
28 {0x04,(0x01 << 3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge
29 {0x04,(0x02 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0},
30 {0x04,(0x03 << 3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0},
31 {0x04,(0x04 << 3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0},
32 {0x04,(0x05 << 3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0},
33 {0x04,(0x06 << 3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0},
34 {0x04,(0x09 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0},
35 {0x01,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168
36 {0x02,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0},
37 {0x03,(0x00 << 3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0},
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]38 }
Patrick Georgi71555952021-02-11 14:40:01 +0100[diff] [blame]39 /* clang-format on */
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]40};
41
42unsigned long write_pirq_routing_table(unsigned long addr)
43{
Stefan Reinauera47bd912012-11-15 15:15:15 -0800[diff] [blame]44 return copy_pirq_routing_table(addr, &intel_irq_routing_table);
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]45}