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Angel Pons0c58dc62020-04-03 01:21:09 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Mono9b908242014-03-02 18:40:36 +01002
3#include <device/device.h>
Mono9b908242014-03-02 18:40:36 +01004#include <arch/smp/mpspec.h>
5#include <arch/ioapic.h>
Mono9b908242014-03-02 18:40:36 +01006
7static void *smp_write_config_table(void *v)
8{
Elyes HAOUAS8da96e52016-09-22 21:20:54 +02009 struct mp_config_table *mc;
Mono9b908242014-03-02 18:40:36 +010010 int isa_bus;
11
Elyes HAOUAS8da96e52016-09-22 21:20:54 +020012 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
Mono9b908242014-03-02 18:40:36 +010013
Kyösti Mälkkidea42e02021-05-31 20:26:16 +030014 mptable_init(mc);
Mono9b908242014-03-02 18:40:36 +010015
Elyes HAOUAS8da96e52016-09-22 21:20:54 +020016 smp_write_processors(mc);
Mono9b908242014-03-02 18:40:36 +010017
18 mptable_write_buses(mc, NULL, &isa_bus);
19
20 /* I/O APICs: APIC ID Version State Address */
Felix Held0d192892024-02-06 16:55:29 +010021 u8 ioapic_id = smp_write_ioapic_from_hw(mc, IO_APIC_ADDR);
Mono9b908242014-03-02 18:40:36 +010022
23 /* Legacy Interrupts */
Kyösti Mälkki860cff92021-06-07 22:20:57 +030024 mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
Mono9b908242014-03-02 18:40:36 +010025
26 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, isa_bus, 0x00, MP_APIC_ALL, 0x00);
27 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x00, MP_APIC_ALL, 0x01);
Kyösti Mälkki860cff92021-06-07 22:20:57 +030028 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x01, 0x00, ioapic_id, 0x10); /* PCIe root 0.01.0 */
29 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x02, 0x00, ioapic_id, 0x10); /* VGA 0.02.0 */
30 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1b, 0x00, ioapic_id, 0x16); /* HD Audio 0:1b.0 */
31 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x00, ioapic_id, 0x11); /* PCIe 0:1c.0 */
32 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x01, ioapic_id, 0x10); /* PCIe 0:1c.1 */
33 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x02, ioapic_id, 0x12); /* PCIe 0:1c.2 */
34 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1c, 0x03, ioapic_id, 0x13); /* PCIe 0:1c.3 */
35 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x00, ioapic_id, 0x15); /* USB 0:1d.0 */
36 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x01, ioapic_id, 0x13); /* USB 0:1d.1 */
37 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x02, ioapic_id, 0x12); /* USB 0:1d.2 */
38 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1d, 0x03, ioapic_id, 0x10); /* USB 0:1d.3 */
39 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x00, ioapic_id, 0x12); /* LPC 0:1f.0 */
40 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x01, ioapic_id, 0x13); /* IDE 0:1f.1 */
41 smp_write_pci_intsrc(mc, mp_INT, 0x00, 0x1f, 0x03, ioapic_id, 0x10); /* SATA 0:1f.3 */
42 smp_write_pci_intsrc(mc, mp_INT, 0x03, 0x03, 0x00, ioapic_id, 0x13); /* Firewire 3:03.0 */
Mono9b908242014-03-02 18:40:36 +010043
44 mptable_lintsrc(mc, isa_bus);
45 return mptable_finalize(mc);
46}
47
48unsigned long write_smp_table(unsigned long addr)
49{
50 void *v;
51 v = smp_write_floating_table(addr, 0);
52 return (unsigned long)smp_write_config_table(v);
53}