| Angel Pons | 0c58dc6 | 2020-04-03 01:21:09 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 2 | |
| Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 3 | #include <northbridge/intel/i945/i945.h> |
| Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 4 | #include <southbridge/intel/i82801gx/i82801gx.h> |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 5 | |
| Arthur Heymans | dc584c3 | 2019-11-12 20:37:21 +0100 | [diff] [blame] | 6 | void mainboard_late_rcba_config(void) |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 7 | { |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 8 | /* Device 1f interrupt pin register */ |
| 9 | RCBA32(0x3100) = 0x00042210; | ||||
| 10 | RCBA32(0x3108) = 0x10004321; | ||||
| 11 | |||||
| 12 | /* PCIe Interrupts */ | ||||
| Arthur Heymans | b451df2 | 2017-08-15 20:59:09 +0200 | [diff] [blame] | 13 | RCBA32(D28IP) = 0x00214321; |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 14 | /* HD Audio Interrupt */ |
| Arthur Heymans | b451df2 | 2017-08-15 20:59:09 +0200 | [diff] [blame] | 15 | RCBA32(D27IP) = 0x00000001; |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 16 | |
| 17 | /* dev irq route register */ | ||||
| Arthur Heymans | b451df2 | 2017-08-15 20:59:09 +0200 | [diff] [blame] | 18 | RCBA16(D31IR) = 0x0232; |
| 19 | RCBA16(D30IR) = 0x3246; | ||||
| 20 | RCBA16(D29IR) = 0x0235; | ||||
| 21 | RCBA16(D28IR) = 0x3201; | ||||
| 22 | RCBA16(D27IR) = 0x3216; | ||||
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 23 | |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 24 | /* Disable unused devices */ |
| Arthur Heymans | 6267f5d | 2018-12-15 23:46:48 +0100 | [diff] [blame] | 25 | RCBA32(FD) |= FD_INTLAN; |
| Mono | 9b90824 | 2014-03-02 18:40:36 +0100 | [diff] [blame] | 26 | } |