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review.coreboot.org / coreboot / 0cf0d1499ab4fb86a6c85f83ab4097a62e2e3642 / . / src / drivers / i2c / rtd2132 / rtd2132.c
blob: a3470b0453d8a4311e0ead26f8557fc4e7883a88 [file] [log] [blame]
Duncan Laurie0cf0d142013-07-15 09:11:21 -0700[diff] [blame^]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2013 Google Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <delay.h>
22#include <device/device.h>
23#include <device/smbus.h>
24#include <device/pci.h>
25#include "chip.h"
26
27/* Chip commands */
28#define RTD2132_COMMAND 0x01
29#define RTD2132_DATA 0x00
30#define RTD2132_FIRMWARE 0x80
31#define RTD2132_FIRMWARE_START 0x00
32#define RTD2132_FIRMWARE_STOP 0x01
33
34/* Spread spectrum configuration */
35#define RTD2132_COMMAND_SSCG_CONFIG_0 0x39
36#define RTD2132_SSCG_ENABLE 0xa0
37#define RTD2132_SSCG_DISABLE 0x20
38#define RTD2132_COMMAND_SSCG_CONFIG_1 0x3a
39#define RTD2132_SSCG_CONFIG_DISABLED 0x01 /* DISABLED */
40#define RTD2132_SSCG_CONFIG_0_5 0x07 /* 0.5% */
41#define RTD2132_SSCG_CONFIG_1_0 0x0f /* 1.0% */
42#define RTD2132_SSCG_CONFIG_1_5 0x16 /* 1.5% */
43
44/* Configuration values from devicetree */
45#define RTD2132_SSCG_PERCENT_0_0 0x00 /* DISABLED */
46#define RTD2132_SSCG_PERCENT_0_5 0x05 /* 0.5% */
47#define RTD2132_SSCG_PERCENT_1_0 0x10 /* 1.0% */
48#define RTD2132_SSCG_PERCENT_1_5 0x15 /* 1.5% */
49
50static void rtd2132_firmware_stop(device_t dev)
51{
52 smbus_write_byte(dev, RTD2132_FIRMWARE, RTD2132_FIRMWARE_STOP);
53 mdelay(2);
54}
55
56static void rtd2132_firmware_start(device_t dev)
57{
58 smbus_write_byte(dev, RTD2132_FIRMWARE, RTD2132_FIRMWARE_START);
59}
60
61static void rtd2132_sscg_enable(device_t dev, u8 sscg_percent)
62{
63 /* SSCG_Config_0 */
64 smbus_write_byte(dev, RTD2132_COMMAND, RTD2132_COMMAND_SSCG_CONFIG_0);
65 smbus_write_byte(dev, RTD2132_DATA, RTD2132_SSCG_ENABLE);
66
67 /* SSCG_Config_1 */
68 smbus_write_byte(dev, RTD2132_COMMAND, RTD2132_COMMAND_SSCG_CONFIG_1);
69 smbus_write_byte(dev, RTD2132_DATA, sscg_percent);
70}
71
72static void rtd2132_sscg_disable(device_t dev)
73{
74 /* SSCG_Config_0 */
75 smbus_write_byte(dev, RTD2132_COMMAND, RTD2132_COMMAND_SSCG_CONFIG_0);
76 smbus_write_byte(dev, RTD2132_DATA, RTD2132_SSCG_DISABLE);
77
78 /* SSCG_Config_1 */
79 smbus_write_byte(dev, RTD2132_COMMAND, RTD2132_COMMAND_SSCG_CONFIG_1);
80 smbus_write_byte(dev, RTD2132_DATA, RTD2132_SSCG_CONFIG_DISABLED);
81}
82
83static void rtd2132_setup(device_t dev)
84{
85 struct drivers_i2c_rtd2132_config *config = dev->chip_info;
86
87 if (!config)
88 return;
89
90 /* Stop running firmware */
91 rtd2132_firmware_stop(dev);
92
93 /* Spread spectrum configuration */
94 switch (config->sscg_percent) {
95 case RTD2132_SSCG_PERCENT_0_0:
96 printk(BIOS_INFO, "RTD2132: Disable Spread Spectrum\n");
97 rtd2132_sscg_disable(dev);
98 break;
99 case RTD2132_SSCG_PERCENT_0_5:
100 printk(BIOS_INFO, "RTD2132: Enable 0.5%% Spread Spectrum\n");
101 rtd2132_sscg_enable(dev, RTD2132_SSCG_CONFIG_0_5);
102 break;
103 case RTD2132_SSCG_PERCENT_1_0:
104 printk(BIOS_INFO, "RTD2132: Enable 1.0%% Spread Spectrum\n");
105 rtd2132_sscg_enable(dev, RTD2132_SSCG_CONFIG_1_0);
106 break;
107 case RTD2132_SSCG_PERCENT_1_5:
108 printk(BIOS_INFO, "RTD2132: Enable 1.5%% Spread Spectrum\n");
109 rtd2132_sscg_enable(dev, RTD2132_SSCG_CONFIG_1_5);
110 break;
111 default:
112 printk(BIOS_ERR, "RTD2132: Invalid Spread Spectrum 0x%02x\n",
113 config->sscg_percent);
114 }
115
116 /* Start firmware */
117 rtd2132_firmware_start(dev);
118}
119
120static void rtd2132_init(device_t dev)
121{
122 if (dev->enabled && dev->path.type == DEVICE_PATH_I2C &&
123 ops_smbus_bus(get_pbus_smbus(dev))) {
124 rtd2132_setup(dev);
125 }
126}
127
128static void rtd2132_noop(device_t dummy)
129{
130}
131
132static struct device_operations rtd2132_operations = {
133 .read_resources = rtd2132_noop,
134 .set_resources = rtd2132_noop,
135 .enable_resources = rtd2132_noop,
136 .init = rtd2132_init,
137};
138
139static void enable_dev(struct device *dev)
140{
141 dev->ops = &rtd2132_operations;
142}
143
144struct chip_operations drivers_i2c_rtd2132_ops = {
145 CHIP_NAME("Realtek RTD2132 LVDS Bridge")
146 .enable_dev = enable_dev,
147};