Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 3 | * |
Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 4 | * Copyright (C) 2004 Eric W. Biederman |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 16 | #ifndef CPU_X86_CACHE |
| 17 | #define CPU_X86_CACHE |
| 18 | |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 19 | #include <cpu/x86/cr.h> |
| 20 | |
| 21 | #define CR0_CacheDisable (CR0_CD) |
| 22 | #define CR0_NoWriteThrough (CR0_NW) |
Patrick Georgi | 05e740f | 2012-03-31 12:52:21 +0200 | [diff] [blame] | 23 | |
| 24 | #if !defined(__ASSEMBLER__) |
| 25 | |
Stefan Reinauer | 1c3c0fa | 2010-05-19 18:39:23 +0000 | [diff] [blame] | 26 | /* |
| 27 | * Need two versions because ROMCC chokes on certain clobbers: |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 28 | * cache.h:29.71: cache.h:60.24: earlymtrr.c:117.23: romstage.c:144.33: |
Stefan Reinauer | 1c3c0fa | 2010-05-19 18:39:23 +0000 | [diff] [blame] | 29 | * 0x1559920 asm Internal compiler error: lhs 1 regcm == 0 |
| 30 | */ |
Rudolf Marek | beba990 | 2010-05-16 21:51:34 +0000 | [diff] [blame] | 31 | |
Rudolf Marek | fdddce3 | 2010-05-16 22:26:25 +0000 | [diff] [blame] | 32 | #if defined(__GNUC__) |
| 33 | |
Rudolf Marek | 417e66b | 2010-05-16 22:32:58 +0000 | [diff] [blame] | 34 | static inline void wbinvd(void) |
| 35 | { |
| 36 | asm volatile ("wbinvd" ::: "memory"); |
| 37 | } |
| 38 | |
Rudolf Marek | fdddce3 | 2010-05-16 22:26:25 +0000 | [diff] [blame] | 39 | #else |
| 40 | |
Rudolf Marek | 417e66b | 2010-05-16 22:32:58 +0000 | [diff] [blame] | 41 | static inline void wbinvd(void) |
| 42 | { |
| 43 | asm volatile ("wbinvd"); |
| 44 | } |
Rudolf Marek | fdddce3 | 2010-05-16 22:26:25 +0000 | [diff] [blame] | 45 | |
Rudolf Marek | 417e66b | 2010-05-16 22:32:58 +0000 | [diff] [blame] | 46 | #endif |
Rudolf Marek | fdddce3 | 2010-05-16 22:26:25 +0000 | [diff] [blame] | 47 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 48 | static inline void invd(void) |
| 49 | { |
| 50 | asm volatile("invd" ::: "memory"); |
| 51 | } |
Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 52 | |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 53 | /* The following functions require the always_inline due to AMD |
| 54 | * function STOP_CAR_AND_CPU that disables cache as |
Elyes HAOUAS | 918535a | 2016-07-28 21:25:21 +0200 | [diff] [blame] | 55 | * RAM, the cache as RAM stack can no longer be used. Called |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 56 | * functions must be inlined to avoid stack usage. Also, the |
| 57 | * compiler must keep local variables register based and not |
| 58 | * allocated them from the stack. With gcc 4.5.0, some functions |
| 59 | * declared as inline are not being inlined. This patch forces |
| 60 | * these functions to always be inlined by adding the qualifier |
| 61 | * __attribute__((always_inline)) to their declaration. |
| 62 | */ |
| 63 | static inline __attribute__((always_inline)) void enable_cache(void) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 64 | { |
| 65 | unsigned long cr0; |
| 66 | cr0 = read_cr0(); |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 67 | cr0 &= ~(CR0_CD | CR0_NW); |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 68 | write_cr0(cr0); |
| 69 | } |
| 70 | |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 71 | static inline __attribute__((always_inline)) void disable_cache(void) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 72 | { |
| 73 | /* Disable and write back the cache */ |
| 74 | unsigned long cr0; |
| 75 | cr0 = read_cr0(); |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 76 | cr0 |= CR0_CD; |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 77 | wbinvd(); |
| 78 | write_cr0(cr0); |
| 79 | wbinvd(); |
| 80 | } |
| 81 | |
Stefan Reinauer | 35b6bbb | 2010-03-28 21:26:54 +0000 | [diff] [blame] | 82 | #if !defined(__PRE_RAM__) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 83 | void x86_enable_cache(void); |
Stefan Reinauer | 35b6bbb | 2010-03-28 21:26:54 +0000 | [diff] [blame] | 84 | #endif |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 85 | |
Patrick Georgi | 05e740f | 2012-03-31 12:52:21 +0200 | [diff] [blame] | 86 | #endif /* !__ASSEMBLER__ */ |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 87 | #endif /* CPU_X86_CACHE */ |