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Marc Jones8ae8c882007-12-19 01:32:08 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Marc Jones8ae8c882007-12-19 01:32:08 +00003 *
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Marc Jones8ae8c882007-12-19 01:32:08 +000014 */
15
16#ifndef AMDFAM10_SYSCONF_H
17#define AMDFAM10_SYSCONF_H
18
stepan8301d832010-12-08 07:07:33 +000019#include "northbridge/amd/amdfam10/nums.h"
Marc Jones8ae8c882007-12-19 01:32:08 +000020
21#include <cpu/x86/msr.h>
22
23struct p_state_t {
Lee Leahy0ca2a062017-03-06 18:01:04 -080024 unsigned int corefreq;
25 unsigned int power;
26 unsigned int transition_lat;
27 unsigned int busmaster_lat;
28 unsigned int control;
29 unsigned int status;
Marc Jones8ae8c882007-12-19 01:32:08 +000030};
31
32struct amdfam10_sysconf_t {
33 //ht
Lee Leahy0ca2a062017-03-06 18:01:04 -080034 unsigned int hc_possible_num;
35 unsigned int pci1234[HC_POSSIBLE_NUM];
36 unsigned int hcdn[HC_POSSIBLE_NUM];
37 unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type
38 unsigned int sbdn;
39 unsigned int sblk;
Marc Jones8ae8c882007-12-19 01:32:08 +000040
Lee Leahy0ca2a062017-03-06 18:01:04 -080041 unsigned int nodes;
42 unsigned int ht_c_num; // we only can have 32 ht chain at most
43 unsigned int ht_c_conf_bus[HC_NUMS]; // 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable
44 unsigned int io_addr_num;
45 unsigned int conf_io_addr[HC_NUMS];
46 unsigned int conf_io_addrx[HC_NUMS];
47 unsigned int mmio_addr_num;
48 unsigned int conf_mmio_addr[HC_NUMS*2]; // mem and pref mem
49 unsigned int conf_mmio_addrx[HC_NUMS*2];
50 unsigned int segbit;
51 unsigned int hcdn_reg[HC_NUMS]; // it will be used by get_pci1234
Marc Jones8ae8c882007-12-19 01:32:08 +000052
53 msr_t msr_pstate[NODE_NUMS * 5]; // quad cores all cores in one node should be the same, and p0,..p5
Lee Leahy0ca2a062017-03-06 18:01:04 -080054 unsigned int needs_update_pstate_msrs;
Marc Jones8ae8c882007-12-19 01:32:08 +000055
Lee Leahy0ca2a062017-03-06 18:01:04 -080056 unsigned int bsp_apicid;
Marc Jones8ae8c882007-12-19 01:32:08 +000057 int enabled_apic_ext_id;
Lee Leahy0ca2a062017-03-06 18:01:04 -080058 unsigned int lift_bsp_apicid;
Marc Jones8ae8c882007-12-19 01:32:08 +000059 int apicid_offset;
60
Martin Roth0cb07e32013-07-09 21:46:01 -060061 void *mb; // pointer for mb related struct
Marc Jones8ae8c882007-12-19 01:32:08 +000062
63};
64
65extern struct amdfam10_sysconf_t sysconf;
66
Stefan Reinauere9de1e22010-04-07 15:30:11 +000067void get_sblk_pci1234(void);
68void get_bus_conf(void);
Marc Jones8ae8c882007-12-19 01:32:08 +000069#endif