Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 0c797f1c28cd16c64482b2cea554e89baaa31445 / . / src / mainboard / gizmosphere / gizmo / irq_tables.c
blob: bb335685621d07fcb31109b5fa829fa7bb7774fa [file] [log] [blame]
Dave Frodin892d1292013-12-11 12:38:40 -0700[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 * Copyright (C) 2013 Sage Electronic Engineering, LLC
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21
22#include <console/console.h>
23#include <device/pci.h>
24#include <string.h>
25#include <stdint.h>
26#include <arch/pirq_routing.h>
27#include <cpu/amd/amdfam14.h>
28
29
30static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
31 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
32 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
33 u8 slot, u8 rfu)
34{
35 pirq_info->bus = bus;
36 pirq_info->devfn = devfn;
37 pirq_info->irq[0].link = link0;
38 pirq_info->irq[0].bitmap = bitmap0;
39 pirq_info->irq[1].link = link1;
40 pirq_info->irq[1].bitmap = bitmap1;
41 pirq_info->irq[2].link = link2;
42 pirq_info->irq[2].bitmap = bitmap2;
43 pirq_info->irq[3].link = link3;
44 pirq_info->irq[3].bitmap = bitmap3;
45 pirq_info->slot = slot;
46 pirq_info->rfu = rfu;
47}
Dave Frodin892d1292013-12-11 12:38:40 -0700[diff] [blame]48
49unsigned long write_pirq_routing_table(unsigned long addr)
50{
51
52 struct irq_routing_table *pirq;
53 struct irq_info *pirq_info;
54 u32 slot_num;
55 u8 *v;
56
57 u8 sum = 0;
58 int i;
59
Dave Frodin892d1292013-12-11 12:38:40 -0700[diff] [blame]60 /* Align the table to be 16 byte aligned. */
61 addr += 15;
62 addr &= ~15;
63
64 /* This table must be between 0xf0000 & 0x100000 */
65 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
66
67 pirq = (void *)(addr);
68 v = (u8 *) (addr);
69
70 pirq->signature = PIRQ_SIGNATURE;
71 pirq->version = PIRQ_VERSION;
72
Kyösti Mälkki0c797f12014-07-21 19:35:16 +0300[diff] [blame^]73 pirq->rtr_bus = 0;
74 pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
Dave Frodin892d1292013-12-11 12:38:40 -0700[diff] [blame]75
76 pirq->exclusive_irqs = 0;
77
78 pirq->rtr_vendor = 0x1002;
79 pirq->rtr_device = 0x4384;
80
81 pirq->miniport_data = 0;
82
83 memset(pirq->rfu, 0, sizeof(pirq->rfu));
84
85 pirq_info = (void *)(&pirq->checksum + 1);
86 slot_num = 0;
87
88
89 /* pci bridge */
Kyösti Mälkki0c797f12014-07-21 19:35:16 +0300[diff] [blame^]90 write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
Dave Frodin892d1292013-12-11 12:38:40 -0700[diff] [blame]91 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
92 0);
93 pirq_info++;
94
95
96
97 slot_num++;
98
99
100
101 pirq->size = 32 + 16 * slot_num;
102
103 for (i = 0; i < pirq->size; i++)
104 sum += v[i];
105
106 sum = pirq->checksum - sum;
107
108 if (sum != pirq->checksum) {
109 pirq->checksum = sum;
110 }
111
112 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
113
114 return (unsigned long)pirq_info;
115
116}