blob: eb3e5e522b4bc80d1153999e8189bc42dae0766e [file] [log] [blame]
Zheng Bao910f4ca2011-03-28 04:38:14 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Zheng Bao910f4ca2011-03-28 04:38:14 +000018 */
19
20/*
21DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
22 )
23 {
24 #include "routing.asl"
25 }
26*/
27
28/* Routing is in System Bus scope */
29Scope(\_SB) {
30 Name(PR0, Package(){
31 /* NB devices */
32 /* Bus 0, Dev 0 - RS780 Host Controller */
33 Package (0x04) { 0xFFFF, Zero, INTA, Zero },
34
35 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
36 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
37 Package(){0x0002FFFF, 0, INTC, 0 },
38 Package(){0x0002FFFF, 1, INTD, 0 },
39 Package(){0x0002FFFF, 2, INTA, 0 },
40 Package(){0x0002FFFF, 3, INTB, 0 },
41 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
42 Package(){0x0003FFFF, 0, INTD, 0 },
43 Package(){0x0003FFFF, 1, INTA, 0 },
44 Package(){0x0003FFFF, 2, INTB, 0 },
45 Package(){0x0003FFFF, 3, INTC, 0 },
46 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
47 Package(){0x0004FFFF, 0, INTA, 0 },
48 Package(){0x0004FFFF, 1, INTB, 0 },
49 Package(){0x0004FFFF, 2, INTC, 0 },
50 Package(){0x0004FFFF, 3, INTD, 0 },
51 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
52 Package(){0x0005FFFF, 0, INTB, 0 },
53 Package(){0x0005FFFF, 1, INTC, 0 },
54 Package(){0x0005FFFF, 2, INTD, 0 },
55 Package(){0x0005FFFF, 3, INTA, 0 },
56 /* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
57 Package(){0x0006FFFF, 0, INTC, 0 },
58 Package(){0x0006FFFF, 1, INTD, 0 },
59 Package(){0x0006FFFF, 2, INTA, 0 },
60 Package(){0x0006FFFF, 3, INTB, 0 },
61 /* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
62 Package(){0x0007FFFF, 0, INTD, 0 },
63 Package(){0x0007FFFF, 1, INTA, 0 },
64 Package(){0x0007FFFF, 2, INTB, 0 },
65 Package(){0x0007FFFF, 3, INTC, 0 },
66 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
67
68 /* Bus 0, Dev 9 - PCIe Bridge for network card */
69 Package(){0x0009FFFF, 0, INTB, 0 },
70 Package(){0x0009FFFF, 1, INTC, 0 },
71 Package(){0x0009FFFF, 2, INTD, 0 },
72 Package(){0x0009FFFF, 3, INTA, 0 },
73
74 /* Bus 0, Dev a - PCIe Bridge for network card */
75 Package(){0x000AFFFF, 0, INTC, 0 },
76 Package(){0x000AFFFF, 1, INTD, 0 },
77 Package(){0x000AFFFF, 2, INTA, 0 },
78 Package(){0x000AFFFF, 3, INTB, 0 },
79
80 /* Bus 0, Dev b - */
81 Package(){0x000BFFFF, 0, INTD, 0 },
82 Package(){0x000BFFFF, 1, INTA, 0 },
83 Package(){0x000BFFFF, 2, INTB, 0 },
84 Package(){0x000BFFFF, 3, INTC, 0 },
85
86 /* Bus 0, Dev c - */
87 Package(){0x000CFFFF, 0, INTA, 0 },
88 Package(){0x000CFFFF, 1, INTB, 0 },
89 Package(){0x000CFFFF, 2, INTC, 0 },
90 Package(){0x000CFFFF, 3, INTD, 0 },
91
92 /* Bus 0, Dev 17 - SATA controller */
93 Package(){0x0011FFFF, 0, INTG, 0 },
94
95 /* Bus 0, Dev 19 - USB: OHCI, funct 0-4; EHCI, funct 5 */
96 Package(){0x0012FFFF, 0, INTA, 0 },
97 Package(){0x0012FFFF, 1, INTB, 0 },
98 Package(){0x0012FFFF, 2, INTC, 0 },
99 Package(){0x0012FFFF, 3, INTD, 0 },
100
101 Package(){0x0013FFFF, 0, INTC, 0 },
102 Package(){0x0013FFFF, 1, INTD, 0 },
103 Package(){0x0013FFFF, 2, INTA, 0 },
104 Package(){0x0013FFFF, 3, INTB, 0 },
105
106 /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:AC97 Audio;F6:AC97 Modem */
107 Package(){0x0014FFFF, 0, INTA, 0 },
108 Package(){0x0014FFFF, 1, INTB, 0 },
109 Package(){0x0014FFFF, 2, INTC, 0 },
110 Package(){0x0014FFFF, 3, INTD, 0 },
111 })
112
113 Name(APR0, Package(){
114 /* NB devices in APIC mode */
115 /* Bus 0, Dev 0 - RS780 Host Controller */
116 Package (0x04) { 0xFFFF, Zero, Zero, 16 },
117
118 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
119
120 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
121 Package(){0x0002FFFF, 0, 0, 18 },
122 Package(){0x0002FFFF, 1, 0, 19 },
123 Package(){0x0002FFFF, 2, 0, 16 },
124 Package(){0x0002FFFF, 3, 0, 17 },
125
126 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
127 Package(){0x0003FFFF, 0, 0, 19 },
128 Package(){0x0003FFFF, 1, 0, 16 },
129 Package(){0x0003FFFF, 2, 0, 17 },
130 Package(){0x0003FFFF, 3, 0, 18 },
131
132 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
133 Package(){0x0004FFFF, 0, 0, 16 },
134 Package(){0x0004FFFF, 1, 0, 17 },
135 Package(){0x0004FFFF, 2, 0, 18 },
136 Package(){0x0004FFFF, 3, 0, 19 },
137
138 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
139 Package(){0x0005FFFF, 0, 0, 17 },
140 Package(){0x0005FFFF, 1, 0, 18 },
141 Package(){0x0005FFFF, 2, 0, 19 },
142 Package(){0x0005FFFF, 3, 0, 16 },
143
144 /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
145 Package(){0x0006FFFF, 0, 0, 18 },
146 Package(){0x0006FFFF, 1, 0, 19 },
147 Package(){0x0006FFFF, 2, 0, 16 },
148 Package(){0x0006FFFF, 3, 0, 17 },
149
150 /* Bus 0, Dev 7 - PCIe Bridge for network card */
151 Package(){0x0007FFFF, 0, 0, 19 },
152 Package(){0x0007FFFF, 1, 0, 16 },
153 Package(){0x0007FFFF, 2, 0, 17 },
154 Package(){0x0007FFFF, 3, 0, 18 },
155
156 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
157
158 /* Bus 0, Dev 9 - PCIe Bridge for network card */
159 Package(){0x0009FFFF, 0, 0, 17 },
160 Package(){0x0009FFFF, 1, 0, 18 },
161 Package(){0x0009FFFF, 2, 0, 19 },
162 Package(){0x0009FFFF, 3, 0, 16 },
163
164 /* Bus 0, Dev A - PCIe Bridge for network card */
165 Package(){0x000AFFFF, 0, 0, 18 },
166 Package(){0x000AFFFF, 1, 0, 19 },
167 Package(){0x000AFFFF, 2, 0, 16 },
168 Package(){0x000AFFFF, 3, 0, 17 },
169
170 /* Bus 0, Dev b - */
171 Package(){0x000BFFFF, 0, 0, 19 },
172 Package(){0x000BFFFF, 1, 0, 16 },
173 Package(){0x000BFFFF, 2, 0, 17 },
174 Package(){0x000BFFFF, 3, 0, 18 },
175
176 /* Bus 0, Dev c - */
177 Package(){0x000CFFFF, 0, 0, 16 },
178 Package(){0x000CFFFF, 1, 0, 17 },
179 Package(){0x000CFFFF, 2, 0, 18 },
180 Package(){0x000CFFFF, 3, 0, 19 },
181
182 /* Bus 0, Dev 17 - SATA controller */
183 Package(){0x0011FFFF, 0, 0, 22 },
184
185 /* Bus 0, Dev 19 - USB: OHCI, funct 0-4; EHCI, funct 5 */
186 Package(){0x0012FFFF, 0, 0, 16 },
187 Package(){0x0012FFFF, 1, 0, 17 },
188 Package(){0x0012FFFF, 2, 0, 18 },
189 Package(){0x0012FFFF, 3, 0, 19 },
190
191 Package(){0x0013FFFF, 0, 0, 18 },
192 Package(){0x0013FFFF, 1, 0, 19 },
193 Package(){0x0013FFFF, 2, 0, 16 },
194 Package(){0x0013FFFF, 3, 0, 17 },
195 /* Package(){0x00130004, 2, 0, 18 }, */
196 /* Package(){0x00130005, 3, 0, 19 }, */
197
198 /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:AC97 Audio;F6:AC97 Modem */
199 Package(){0x0014FFFF, 0, 0, 16 },
200 Package(){0x0014FFFF, 1, 0, 17 },
201 Package(){0x0014FFFF, 2, 0, 18 },
202 Package(){0x0014FFFF, 3, 0, 19 },
203 /* Package(){0x00140004, 2, 0, 18 }, */
204 /* Package(){0x00140004, 3, 0, 19 }, */
205 /* Package(){0x00140005, 1, 0, 17 }, */
206 /* Package(){0x00140006, 1, 0, 17 }, */
207 })
208
209 Name(PR1, Package(){
210 /* Internal graphics - RS780 VGA, Bus1, Dev5 */
211 Package(){0x0005FFFF, 0, INTA, 0 },
212 Package(){0x0005FFFF, 1, INTB, 0 },
213 Package(){0x0005FFFF, 2, INTC, 0 },
214 Package(){0x0005FFFF, 3, INTD, 0 },
215 })
216
217 Name(APR1, Package(){
218 /* Internal graphics - RS780 VGA, Bus1, Dev5 */
219 Package(){0x0005FFFF, 0, 0, 18 },
220 Package(){0x0005FFFF, 1, 0, 19 },
221 /* Package(){0x0005FFFF, 2, 0, 20 }, */
222 /* Package(){0x0005FFFF, 3, 0, 17 }, */
223 })
224
225 Name(PS2, Package(){
226 /* The external GFX - Hooked to PCIe slot 2 */
227 Package(){0x0000FFFF, 0, INTC, 0 },
228 Package(){0x0000FFFF, 1, INTD, 0 },
229 Package(){0x0000FFFF, 2, INTA, 0 },
230 Package(){0x0000FFFF, 3, INTB, 0 },
231 })
232
233 Name(APS2, Package(){
234 /* The external GFX - Hooked to PCIe slot 2 */
235 Package(){0x0000FFFF, 0, 0, 18 },
236 Package(){0x0000FFFF, 1, 0, 19 },
237 Package(){0x0000FFFF, 2, 0, 16 },
238 Package(){0x0000FFFF, 3, 0, 17 },
239 })
240
241 Name(PS4, Package(){
242 /* PCIe slot - Hooked to PCIe slot 4 */
243 Package(){0x0000FFFF, 0, INTA, 0 },
244 Package(){0x0000FFFF, 1, INTB, 0 },
245 Package(){0x0000FFFF, 2, INTC, 0 },
246 Package(){0x0000FFFF, 3, INTD, 0 },
247 })
248
249 Name(APS4, Package(){
250 /* PCIe slot - Hooked to PCIe slot 4 */
251 Package(){0x0000FFFF, 0, 0, 16 },
252 Package(){0x0000FFFF, 1, 0, 17 },
253 Package(){0x0000FFFF, 2, 0, 18 },
254 Package(){0x0000FFFF, 3, 0, 19 },
255 })
256
257 Name(PS5, Package(){
258 /* PCIe slot - Hooked to PCIe slot 5 */
259 Package(){0x0000FFFF, 0, INTB, 0 },
260 Package(){0x0000FFFF, 1, INTC, 0 },
261 Package(){0x0000FFFF, 2, INTD, 0 },
262 Package(){0x0000FFFF, 3, INTA, 0 },
263 })
264
265 Name(APS5, Package(){
266 /* PCIe slot - Hooked to PCIe slot 5 */
267 Package(){0x0000FFFF, 0, 0, 45 },
268 Package(){0x0000FFFF, 1, 0, 46 },
269 Package(){0x0000FFFF, 2, 0, 47 },
270 Package(){0x0000FFFF, 3, 0, 44 },
271 })
272
273 Name(PS6, Package(){
274 /* PCIe slot - Hooked to PCIe slot 6 */
275 Package(){0x0000FFFF, 0, INTC, 0 },
276 Package(){0x0000FFFF, 1, INTD, 0 },
277 Package(){0x0000FFFF, 2, INTA, 0 },
278 Package(){0x0000FFFF, 3, INTB, 0 },
279 })
280
281 Name(APS6, Package(){
282 /* PCIe slot - Hooked to PCIe slot 6 */
283 Package(){0x0000FFFF, 0, 0, 46 },
284 Package(){0x0000FFFF, 1, 0, 47 },
285 Package(){0x0000FFFF, 2, 0, 44 },
286 Package(){0x0000FFFF, 3, 0, 45 },
287 })
288
289 Name(PS7, Package(){
290 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
291 Package(){0x0000FFFF, 0, INTD, 0 },
292 Package(){0x0000FFFF, 1, INTA, 0 },
293 Package(){0x0000FFFF, 2, INTB, 0 },
294 Package(){0x0000FFFF, 3, INTC, 0 },
295 })
296
297 Name(APS7, Package(){
298 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
299 Package(){0x0000FFFF, 0, 0, 47 },
300 Package(){0x0000FFFF, 1, 0, 44 },
301 Package(){0x0000FFFF, 2, 0, 45 },
302 Package(){0x0000FFFF, 3, 0, 46 },
303 })
304
305 Name(PS9, Package(){
306 /* PCIe slot - Hooked to PCIe slot 9 */
307 Package(){0x0000FFFF, 0, INTB, 0 },
308 Package(){0x0000FFFF, 1, INTC, 0 },
309 Package(){0x0000FFFF, 2, INTD, 0 },
310 Package(){0x0000FFFF, 3, INTA, 0 },
311 })
312
313 Name(APS9, Package(){
314 /* PCIe slot - Hooked to PCIe slot 9 */
315 Package(){0x0000FFFF, 0, 0, 17 },
316 Package(){0x0000FFFF, 1, 0, 18 },
317 Package(){0x0000FFFF, 2, 0, 19 },
318 Package(){0x0000FFFF, 3, 0, 16 },
319 })
320 Name(PSa, Package(){
321 /* PCIe slot - Hooked to PCIe slot 10 */
322 Package(){0x0000FFFF, 0, INTC, 0 },
323 Package(){0x0000FFFF, 1, INTD, 0 },
324 Package(){0x0000FFFF, 2, INTA, 0 },
325 Package(){0x0000FFFF, 3, INTB, 0 },
326 })
327
328 Name(APSa, Package(){
329 /* PCIe slot - Hooked to PCIe slot 10 */
330 Package(){0x0000FFFF, 0, 0, 18 },
331 Package(){0x0000FFFF, 1, 0, 19 },
332 Package(){0x0000FFFF, 2, 0, 16 },
333 Package(){0x0000FFFF, 3, 0, 17 },
334 })
335
336 Name(PSb, Package(){
337 /* PCIe slot - Hooked to PCIe slot 11 */
338 Package(){0x0000FFFF, 0, INTD, 0 },
339 Package(){0x0000FFFF, 1, INTA, 0 },
340 Package(){0x0000FFFF, 2, INTB, 0 },
341 Package(){0x0000FFFF, 3, INTC, 0 },
342 })
343
344 Name(APSb, Package(){
345 /* PCIe slot - Hooked to PCIe slot 11 */
346 Package(){0x0000FFFF, 0, 0, 32 },
347 Package(){0x0000FFFF, 1, 0, 33 },
348 Package(){0x0000FFFF, 2, 0, 34 },
349 Package(){0x0000FFFF, 3, 0, 34 },
350 })
351
352 Name(PSc, Package(){
353 /* PCIe slot - Hooked to PCIe slot 12 */
354 Package(){0x0000FFFF, 0, INTD, 0 },
355 Package(){0x0000FFFF, 1, INTA, 0 },
356 Package(){0x0000FFFF, 2, INTB, 0 },
357 Package(){0x0000FFFF, 3, INTC, 0 },
358 })
359
360 Name(APSc, Package(){
361 /* PCIe slot - Hooked to PCIe slot 12 */
362 Package(){0x0000FFFF, 0, 0, 36 },
363 Package(){0x0000FFFF, 1, 0, 37 },
364 Package(){0x0000FFFF, 2, 0, 38 },
365 Package(){0x0000FFFF, 3, 0, 39 },
366 })
367
368 Name(PCIB, Package(){
369 /* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */
370 Package(){0x0005FFFF, 0, 0, 0x14 },
371 Package(){0x0005FFFF, 1, 0, 0x15 },
372 Package(){0x0005FFFF, 2, 0, 0x16 },
373 Package(){0x0005FFFF, 3, 0, 0x17 },
374 Package(){0x0006FFFF, 0, 0, 0x15 },
375 Package(){0x0006FFFF, 1, 0, 0x16 },
376 Package(){0x0006FFFF, 2, 0, 0x17 },
377 Package(){0x0006FFFF, 3, 0, 0x14 },
378 Package(){0x0007FFFF, 0, 0, 0x16 },
379 Package(){0x0007FFFF, 1, 0, 0x17 },
380 Package(){0x0007FFFF, 2, 0, 0x14 },
381 Package(){0x0007FFFF, 3, 0, 0x15 },
382 })
383}