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David Hendricks90a42d82013-06-14 16:06:11 -07001/*
2 * Copyright (C) 2012 Samsung Electronics
3 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __MAX77802_H_
25#define __MAX77802_H_
26
27enum {
28 MAX77802_REG_PMIC_ID = 0x0,
29 MAX77802_REG_PMIC_INTSRC,
30 MAX77802_REG_PMIC_INT1,
31 MAX77802_REG_PMIC_INT2,
32 MAX77802_REG_PMIC_INT1MSK,
33 MAX77802_REG_PMIC_INT2MSK,
34
35 MAX77802_REG_PMIC_STATUS1,
36 MAX77802_REG_PMIC_STATUS2,
37
38 MAX77802_REG_PMIC_PWRON,
39 MAX77802_REG_PMIC_MRSTB = 0xA,
40 MAX77802_REG_PMIC_EPWRHOLD,
41 MAX77802_REG_PMIC_BOOSTCTRL = 0xE,
42 MAX77802_REG_PMIC_BOOSTOUT,
43
44 MAX77802_REG_PMIC_BUCK1CTRL = 0x10,
45 MAX77802_REG_PMIC_BUCK1DVS1,
46 MAX77802_REG_PMIC_BUCK1DVS2,
47 MAX77802_REG_PMIC_BUCK1DVS3,
48 MAX77802_REG_PMIC_BUCK1DVS4,
49 MAX77802_REG_PMIC_BUCK1DVS5,
50 MAX77802_REG_PMIC_BUCK1DVS6,
51 MAX77802_REG_PMIC_BUCK1DVS7,
52 MAX77802_REG_PMIC_BUCK1DVS8,
53
54 MAX77802_REG_PMIC_BUCK234FREQ,
55 MAX77802_REG_PMIC_BUCK2CTRL1,
56 MAX77802_REG_PMIC_BUCK2CTRL2,
57 MAX77802_REG_PMIC_BUCK2PHTRAN,
58
59 MAX77802_REG_PMIC_BUCK2DVS1,
60 MAX77802_REG_PMIC_BUCK2DVS2,
61 MAX77802_REG_PMIC_BUCK2DVS3,
62 MAX77802_REG_PMIC_BUCK2DVS4,
63 MAX77802_REG_PMIC_BUCK2DVS5,
64 MAX77802_REG_PMIC_BUCK2DVS6,
65 MAX77802_REG_PMIC_BUCK2DVS7,
66 MAX77802_REG_PMIC_BUCK2DVS8,
67 MAX77802_REG_PMIC_BUCK3CTRL1 = 0x27,
68 MAX77802_REG_PMIC_BUCK3DVS1,
69 MAX77802_REG_PMIC_BUCK3DVS2,
70 MAX77802_REG_PMIC_BUCK3DVS3,
71 MAX77802_REG_PMIC_BUCK3DVS4,
72 MAX77802_REG_PMIC_BUCK3DVS5,
73 MAX77802_REG_PMIC_BUCK3DVS6,
74 MAX77802_REG_PMIC_BUCK3DVS7,
75 MAX77802_REG_PMIC_BUCK3DVS8,
76 MAX77802_REG_PMIC_BUCK4CTRL1 = 0x37,
77 MAX77802_REG_PMIC_BUCK4DVS1,
78 MAX77802_REG_PMIC_BUCK4DVS2,
79 MAX77802_REG_PMIC_BUCK4DVS3,
80 MAX77802_REG_PMIC_BUCK4DVS4,
81 MAX77802_REG_PMIC_BUCK4DVS5,
82 MAX77802_REG_PMIC_BUCK4DVS6,
83 MAX77802_REG_PMIC_BUCK4DVS7,
84 MAX77802_REG_PMIC_BUCK4DVS8,
85 MAX77802_REG_PMIC_BUCK5CTRL1 = 0x40,
86 MAX77802_REG_PMIC_BUCK5CTRL,
87 MAX77802_REG_PMIC_BUCK5OUT,
88
89 MAX77802_REG_PMIC_BUCK6CTRL = 0x44,
90 MAX77802_REG_PMIC_BUCK6DVS1,
91 MAX77802_REG_PMIC_BUCK6DVS2,
92 MAX77802_REG_PMIC_BUCK6DVS3,
93 MAX77802_REG_PMIC_BUCK6DVS4,
94 MAX77802_REG_PMIC_BUCK6DVS5,
95 MAX77802_REG_PMIC_BUCK6DVS6,
96 MAX77802_REG_PMIC_BUCK6DVS7,
97 MAX77802_REG_PMIC_BUCK6DVS8,
98
99 MAX77802_REG_PMIC_BUCK7CTRL = 0x4E,
100 MAX77802_REG_PMIC_BUCK7OUT,
101
102 MAX77802_REG_PMIC_BUCK8CTRL = 0x51,
103 MAX77802_REG_PMIC_BUCK8OUT,
104
105 MAX77802_REG_PMIC_BUCK9CTRL = 0x54,
106 MAX77802_REG_PMIC_BUCK9OUT,
107
108 MAX77802_REG_PMIC_BUCK10CTRL = 0x57,
109 MAX77802_REG_PMIC_BUCK10OUT,
110
111 MAX77802_REG_PMIC_LDO1CTRL1 = 0x60,
112 MAX77802_REG_PMIC_LDO2CTRL1,
113 MAX77802_REG_PMIC_LDO3CTRL1,
114 MAX77802_REG_PMIC_LDO4CTRL1,
115 MAX77802_REG_PMIC_LDO5CTRL1,
116 MAX77802_REG_PMIC_LDO6CTRL1,
117 MAX77802_REG_PMIC_LDO7CTRL1,
118 MAX77802_REG_PMIC_LDO8CTRL1,
119 MAX77802_REG_PMIC_LDO9CTRL1,
120 MAX77802_REG_PMIC_LDO10CTRL1,
121 MAX77802_REG_PMIC_LDO11CTRL1,
122 MAX77802_REG_PMIC_LDO12CTRL1,
123 MAX77802_REG_PMIC_LDO13CTRL1,
124 MAX77802_REG_PMIC_LDO14CTRL1,
125 MAX77802_REG_PMIC_LDO15CTRL1,
126
127 MAX77802_REG_PMIC_LDO17CTRL1 = 0x70,
128 MAX77802_REG_PMIC_LDO18CTRL1,
129 MAX77802_REG_PMIC_LDO19CTRL1,
130 MAX77802_REG_PMIC_LDO20CTRL1,
131 MAX77802_REG_PMIC_LDO21CTRL1,
132
133 MAX77802_REG_PMIC_LDO23CTRL1 = 0x76,
134 MAX77802_REG_PMIC_LDO24CTRL1,
135 MAX77802_REG_PMIC_LDO25CTRL1,
136 MAX77802_REG_PMIC_LDO26CTRL1,
137 MAX77802_REG_PMIC_LDO27CTRL1 = 0x7A,
138 MAX77802_REG_PMIC_LDO28CTRL1,
139 MAX77802_REG_PMIC_LDO29CTRL1,
140 MAX77802_REG_PMIC_LDO30CTRL1,
141 MAX77802_REG_PMIC_LDO32CTRL1 = 0x7F,
142 MAX77802_REG_PMIC_LDO33CTRL1,
143 MAX77802_REG_PMIC_LDO34CTRL1,
144 MAX77802_REG_PMIC_LDO35CTRL1,
145
146 MAX77802_REG_PMIC_LDO1CTRL2 = 0x90,
147 MAX77802_REG_PMIC_LDO2CTRL2,
148 MAX77802_REG_PMIC_LDO3CTRL2,
149 MAX77802_REG_PMIC_LDO4CTRL2,
150 MAX77802_REG_PMIC_LDO5CTRL2,
151 MAX77802_REG_PMIC_LDO6CTRL2 = 0x95,
152 MAX77802_REG_PMIC_LDO7CTRL2,
153 MAX77802_REG_PMIC_LDO8CTRL2,
154 MAX77802_REG_PMIC_LDO9CTRL2,
155 MAX77802_REG_PMIC_LDO10CTRL2,
156 MAX77802_REG_PMIC_LDO11CTRL2,
157 MAX77802_REG_PMIC_LDO12CTRL2,
158 MAX77802_REG_PMIC_LDO13CTRL2,
159 MAX77802_REG_PMIC_LDO14CTRL2,
160 MAX77802_REG_PMIC_LDO15CTRL2,
161
162 MAX77802_REG_PMIC_LDO17CTRL2 = 0xA0,
163 MAX77802_REG_PMIC_LDO18CTRL2,
164 MAX77802_REG_PMIC_LDO19CTRL2,
165 MAX77802_REG_PMIC_LDO20CTRL2,
166 MAX77802_REG_PMIC_LDO21CTRL2,
167 MAX77802_REG_PMIC_LDO22CTRL2,
168 MAX77802_REG_PMIC_LDO23CTRL2,
169 MAX77802_REG_PMIC_LDO24CTRL2,
170 MAX77802_REG_PMIC_LDO25CTRL2,
171 MAX77802_REG_PMIC_LDO26CTRL2,
172 MAX77802_REG_PMIC_LDO27CTRL2 = 0xAA,
173 MAX77802_REG_PMIC_LDO28CTRL2,
174 MAX77802_REG_PMIC_LDO29CTRL2,
175 MAX77802_REG_PMIC_LDO30CTRL2,
176 MAX77802_REG_PMIC_LDO32CTRL2 = 0xAF,
177 MAX77802_REG_PMIC_LDO33CTRL2 = 0xB0,
178 MAX77802_REG_PMIC_LDO34CTRL2,
179 MAX77802_REG_PMIC_LDO35CTRL2,
180
181 MAX77802_REG_PMIC_BBAT = 0xB4,
182 MAX77802_REG_PMIC_32KHZ,
183
184 MAX77802_NUM_OF_REGS,
185};
186
187/* I2C device address for pmic max77686 */
188#define MAX77802_I2C_ADDR (0x12 >> 1)
189
190enum {
191 LDO_OFF = 0,
192 LDO_ON,
193
194 DIS_LDO = (0x00 << 6),
195 EN_LDO = (0x3 << 6),
196};
197
198/* Buck1 1.0 volt value (P1.0V_AP_MIF) */
David Hendricksea3a4632013-08-01 18:48:26 -0700199#define MAX77802_BUCK1DVS1_1V 0x3E
David Hendricks90a42d82013-06-14 16:06:11 -0700200/* Buck2 1.0 volt value (P1.0V_VDD_ARM) */
David Hendricksea3a4632013-08-01 18:48:26 -0700201#define MAX77802_BUCK2DVS1_1V 0x40
202/* Buck2 1.2625 volt value (P1.2625V_VDD_ARM) */
203#define MAX77802_BUCK2DVS1_1_2625V 0x6A
David Hendricks90a42d82013-06-14 16:06:11 -0700204/* Buck3 1.0 volt value (P1.0V_VDD_INT) */
David Hendricksea3a4632013-08-01 18:48:26 -0700205#define MAX77802_BUCK3DVS1_1V 0x40
David Hendricks90a42d82013-06-14 16:06:11 -0700206/* Buck4 1.0 volt value (P1.0V_VDD_G3D) */
David Hendricksea3a4632013-08-01 18:48:26 -0700207#define MAX77802_BUCK4DVS1_1V 0x40
David Hendricks90a42d82013-06-14 16:06:11 -0700208/* Buck6 1.0 volt value (P1.0V_AP_KFC) */
David Hendricksea3a4632013-08-01 18:48:26 -0700209#define MAX77802_BUCK6DVS1_1V 0x3E
David Hendricks90a42d82013-06-14 16:06:11 -0700210
211/*
212 * Different Bucks use different bits to control power. There are two types,
213 * defined below.
214 */
215/* Type 1, works for BUCKs 1, 5, 6...10 */
216#define MAX77802_BUCK_TYPE1_ON (1 << 0)
217#define MAX77802_BUCK_TYPE1_IGNORE_PWRREQ (1 << 1)
218
219/* Type 2, works for BUCKs 2...4 */
220#define MAX77802_BUCK_TYPE2_ON (1 << 4)
221#define MAX77802_BUCK_TYPE2_IGNORE_PWRREQ (1 << 5)
222
223/* LDO35 1.2 volt value for bridge ic */
224#define MAX77802_LDO35CTRL1_1_2V (1 << 4)
225#define MAX77802_LOD35CTRL1_ON (1 << 6)
226
David Hendricksea3a4632013-08-01 18:48:26 -0700227/* Disable Boost Mode*/
228#define MAX77802_BOOSTCTRL_OFF 0x09
229
David Hendricks90a42d82013-06-14 16:06:11 -0700230/*
231 * MAX77802_REG_PMIC_32KHZ set to 32KH CP
232 * output is activated
233 */
234#define MAX77802_32KHCP_EN (1 << 1)
235
236/*
237 * MAX77802_REG_PMIC_BBAT set to
238 * Back up batery charger on and
239 * limit voltage setting to 3.5v
240 */
241#define MAX77802_BBCHOSTEN (1 << 0)
242#define MAX77802_BBCVS_3_5V (3 << 3)
243
244#endif /* __MAX77802_H_ */