Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Elyes HAOUAS | 865db96 | 2021-01-30 22:44:21 +0100 | [diff] [blame] | 2 | |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 3 | #include <assert.h> |
| 4 | #include <console/console.h> |
| 5 | #include <fsp/api.h> |
| 6 | #include <soc/romstage.h> |
| 7 | #include <spd_bin.h> |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 8 | #include <soc/meminit.h> |
| 9 | #include <baseboard/variants.h> |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 10 | #include "board_id.h" |
| 11 | |
| 12 | #define SPD_ID_MASK 0x7 |
| 13 | |
| 14 | static size_t get_spd_index(void) |
| 15 | { |
| 16 | uint8_t board_id = get_board_id(); |
| 17 | size_t spd_index; |
| 18 | |
| 19 | printk(BIOS_INFO, "board id is 0x%x\n", board_id); |
| 20 | |
| 21 | spd_index = board_id & SPD_ID_MASK; |
| 22 | |
| 23 | printk(BIOS_INFO, "SPD index is 0x%x\n", (unsigned int)spd_index); |
| 24 | return spd_index; |
| 25 | } |
| 26 | |
Subrata Banik | de6b489 | 2021-12-08 16:23:39 +0530 | [diff] [blame] | 27 | /* |
| 28 | * ADL-P silicon can support 7 SRC CLK's and 10 CLKREQ signals. Out of 7 SRCCLK's |
| 29 | * 3 will be used for CPU, the rest are for PCH. If more than 4 PCH devices are |
| 30 | * connected on the platform, an external differential buffer chip needs to be placed at |
| 31 | * the platform level. |
| 32 | * |
| 33 | * GEN3_EXTERNAL_CLOCK_BUFFER Kconfig is selected for ADL-P RVP (not applicable for |
| 34 | * ADL-M/N RVP) |
| 35 | * |
| 36 | * CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER provides the CLKSRC that feed clock to discrete |
| 37 | * buffer for further distribution to platform. |
| 38 | */ |
| 39 | static void configure_external_clksrc(FSP_M_CONFIG *m_cfg) |
| 40 | { |
| 41 | for (unsigned int i = CONFIG_MAX_PCIE_CLOCK_SRC; i < CONFIG_MAX_PCIE_CLOCK_REQ; i++) |
| 42 | m_cfg->PcieClkSrcUsage[i] = CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER; |
| 43 | } |
| 44 | |
Zhuohao Lee | 09f3b6c | 2022-01-20 21:30:12 +0800 | [diff] [blame^] | 45 | void mainboard_memory_init_params(FSPM_UPD *memupd) |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 46 | { |
Zhuohao Lee | 09f3b6c | 2022-01-20 21:30:12 +0800 | [diff] [blame^] | 47 | FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 48 | const struct mb_cfg *mem_config = variant_memory_params(); |
| 49 | int board_id = get_board_id(); |
| 50 | const bool half_populated = false; |
| 51 | |
Meera Ravindranath | eb32a85 | 2021-08-10 20:28:49 +0530 | [diff] [blame] | 52 | const struct mem_spd memory_down_spd_info = { |
Furquan Shaikh | a1c247b | 2020-12-31 22:50:14 -0800 | [diff] [blame] | 53 | .topo = MEM_TOPO_MEMORY_DOWN, |
| 54 | .cbfs_index = get_spd_index(), |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 55 | }; |
| 56 | |
Meera Ravindranath | eb32a85 | 2021-08-10 20:28:49 +0530 | [diff] [blame] | 57 | const struct mem_spd dimm_module_spd_info = { |
Furquan Shaikh | a1c247b | 2020-12-31 22:50:14 -0800 | [diff] [blame] | 58 | .topo = MEM_TOPO_DIMM_MODULE, |
| 59 | .smbus = { |
| 60 | [0] = { |
Subrata Banik | d93a5bc | 2021-02-15 21:48:51 +0530 | [diff] [blame] | 61 | .addr_dimm[0] = 0x50, |
| 62 | .addr_dimm[1] = 0x51, |
Furquan Shaikh | a1c247b | 2020-12-31 22:50:14 -0800 | [diff] [blame] | 63 | }, |
| 64 | [1] = { |
Subrata Banik | d93a5bc | 2021-02-15 21:48:51 +0530 | [diff] [blame] | 65 | .addr_dimm[0] = 0x52, |
| 66 | .addr_dimm[1] = 0x53, |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 67 | }, |
| 68 | }, |
| 69 | }; |
| 70 | |
| 71 | switch (board_id) { |
| 72 | case ADL_P_DDR4_1: |
| 73 | case ADL_P_DDR4_2: |
Deepti Deshatty | 193203f | 2021-04-29 21:32:58 +0530 | [diff] [blame] | 74 | case ADL_P_DDR5_1: |
Meera Ravindranath | eb32a85 | 2021-08-10 20:28:49 +0530 | [diff] [blame] | 75 | memcfg_init(m_cfg, mem_config, &dimm_module_spd_info, half_populated); |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 76 | break; |
Meera Ravindranath | bcc74af | 2021-08-09 16:06:21 +0530 | [diff] [blame] | 77 | case ADL_P_DDR5_2: |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 78 | case ADL_P_LP4_1: |
| 79 | case ADL_P_LP4_2: |
Subrata Banik | 40f53f4 | 2021-02-20 13:52:52 +0530 | [diff] [blame] | 80 | case ADL_P_LP5_1: |
| 81 | case ADL_P_LP5_2: |
Maulik V Vaghela | fb670fe | 2021-02-03 15:10:50 +0530 | [diff] [blame] | 82 | case ADL_M_LP4: |
Maulik V Vaghela | 2d22f82 | 2021-02-03 15:20:04 +0530 | [diff] [blame] | 83 | case ADL_M_LP5: |
Krishna Prasad Bhat | 351d3a1 | 2021-12-17 16:08:04 +0530 | [diff] [blame] | 84 | case ADL_N_LP5: |
Meera Ravindranath | eb32a85 | 2021-08-10 20:28:49 +0530 | [diff] [blame] | 85 | memcfg_init(m_cfg, mem_config, &memory_down_spd_info, half_populated); |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 86 | break; |
| 87 | default: |
| 88 | die("Unknown board id = 0x%x\n", board_id); |
| 89 | break; |
| 90 | } |
Subrata Banik | de6b489 | 2021-12-08 16:23:39 +0530 | [diff] [blame] | 91 | |
| 92 | if (CONFIG(GEN3_EXTERNAL_CLOCK_BUFFER)) |
| 93 | configure_external_clksrc(m_cfg); |
Subrata Banik | 16e4106 | 2020-10-06 20:13:06 +0530 | [diff] [blame] | 94 | } |