Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License as |
| 7 | * published by the Free Software Foundation; version 2 of |
| 8 | * the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 16 | #include <bootblock_common.h> |
Kyösti Mälkki | 3855c01 | 2019-03-03 08:45:19 +0200 | [diff] [blame] | 17 | #include <device/pnp_ops.h> |
Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 18 | #include <northbridge/intel/sandybridge/raminit_native.h> |
Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 19 | #include <southbridge/intel/bd82x6x/pch.h> |
Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 20 | #include <superio/nuvoton/nct6776/nct6776.h> |
| 21 | #include <superio/nuvoton/common/nuvoton.h> |
| 22 | |
| 23 | #define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1) |
| 24 | |
Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 25 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 26 | { 1, 0, 0 }, |
| 27 | { 1, 0, 0 }, |
| 28 | { 1, 1, 1 }, |
| 29 | { 1, 1, 1 }, |
| 30 | { 1, 1, 2 }, |
| 31 | { 1, 1, 2 }, |
| 32 | { 1, 0, 3 }, |
| 33 | { 1, 0, 3 }, |
| 34 | { 1, 0, 4 }, |
| 35 | { 1, 0, 4 }, |
| 36 | { 1, 0, 6 }, |
| 37 | { 1, 1, 5 }, |
| 38 | { 1, 1, 5 }, |
| 39 | { 1, 0, 6 }, |
| 40 | }; |
| 41 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 42 | void bootblock_mainboard_early_init(void) |
Iru Cai | 928c6c6 | 2017-06-15 18:18:51 +0800 | [diff] [blame] | 43 | { |
| 44 | /* Set GPIOs on superio, enable UART */ |
| 45 | nuvoton_pnp_enter_conf_state(SERIAL_DEV); |
| 46 | pnp_set_logical_device(SERIAL_DEV); |
| 47 | |
| 48 | pnp_write_config(SERIAL_DEV, 0x1c, 0x80); |
| 49 | pnp_write_config(SERIAL_DEV, 0x27, 0x80); |
| 50 | pnp_write_config(SERIAL_DEV, 0x2a, 0x60); |
| 51 | |
| 52 | nuvoton_pnp_exit_conf_state(SERIAL_DEV); |
| 53 | |
| 54 | nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
| 55 | } |
| 56 | |
| 57 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 58 | { |
| 59 | read_spd(&spd[0], 0x50, id_only); |
| 60 | read_spd(&spd[1], 0x51, id_only); |
| 61 | read_spd(&spd[2], 0x52, id_only); |
| 62 | read_spd(&spd[3], 0x53, id_only); |
| 63 | } |