Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame^] | 1 | FLASH 16M { |
| 2 | WP_RO@0x0 0x400000 { |
| 3 | SI_DESC@0x0 0x1000 |
| 4 | IFWI@0x1000 0x1ff000 |
| 5 | RO_VPD@0x200000 0x4000 |
| 6 | RO_SECTION@0x204000 0x1fc000 { |
| 7 | FMAP@0x0 0x800 |
| 8 | COREBOOT(CBFS)@0x1000 0x1bb000 |
| 9 | RO_UNUSED@0x1bc000 0x40000 |
| 10 | } |
| 11 | } |
| 12 | MISC_RW@0x400000 0x30000 { |
| 13 | UNIFIED_MRC_CACHE@0x0 0x21000 { |
| 14 | RECOVERY_MRC_CACHE@0x0 0x10000 |
| 15 | RW_MRC_CACHE@0x10000 0x10000 |
| 16 | RW_VAR_MRC_CACHE@0x20000 0x1000 |
| 17 | } |
| 18 | RW_ELOG@0x21000 0x3000 |
| 19 | RW_SHARED@0x24000 0x4000 { |
| 20 | SHARED_DATA@0x0 0x2000 |
| 21 | VBLOCK_DEV@0x2000 0x2000 |
| 22 | } |
| 23 | RW_VPD@0x28000 0x2000 |
| 24 | RW_NVRAM@0x2a000 0x6000 |
| 25 | } |
| 26 | RW_LEGACY(CBFS)@0xd30000 0x200000 |
| 27 | BIOS_UNUSABLE@0xf30000 0x4f000 |
| 28 | DEVICE_EXTENSION@0xf7f000 0x80000 |
| 29 | # Currently, it is required that the BIOS region be a multiple of 8KiB. |
| 30 | # This is required so that the recovery mechanism can find SIGN_CSE |
| 31 | # region aligned to 4K at the center of BIOS region. Since the |
| 32 | # descriptor at the beginning uses 4K and BIOS starts at an offset of |
| 33 | # 4K, a hole of 4K is created towards the end of the flash to compensate |
| 34 | # for the size requirement of BIOS region. |
| 35 | # FIT tool thus creates descriptor with following regions: |
| 36 | # Descriptor --> 0 to 4K |
| 37 | # BIOS --> 4K to 0xf7f000 |
| 38 | # Device ext --> 0xf7f000 to 0xfff000 |
| 39 | UNUSED_HOLE@0xfff000 0x1000 |
| 40 | } |