Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Based on src/southbridge/via/vt8237r/vt8237_fadt.c |
| 5 | * |
| 6 | * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com> |
| 7 | * Copyright (C) 2007, 2009 Rudolf Marek <r.marek@assembler.cz> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 18 | */ |
| 19 | |
| 20 | #include <string.h> |
| 21 | #include <arch/acpi.h> |
| 22 | #include <device/device.h> |
| 23 | #include <device/pci.h> |
| 24 | #include <device/pci_ids.h> |
| 25 | #include "i82371eb.h" |
| 26 | |
| 27 | /** |
| 28 | * Create the Fixed ACPI Description Tables (FADT) for any board with this SB. |
| 29 | * Reference: ACPIspec40a, 5.2.9, page 118 |
| 30 | */ |
| 31 | void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) |
| 32 | { |
| 33 | acpi_header_t *header = &(fadt->header); |
Elyes HAOUAS | 07e77f1 | 2018-05-13 13:25:13 +0200 | [diff] [blame^] | 34 | struct device *dev; |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 35 | |
| 36 | /* Power management controller */ |
| 37 | dev = dev_find_device(PCI_VENDOR_ID_INTEL, |
| 38 | PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI, 0); |
| 39 | |
| 40 | memset((void *) fadt, 0, sizeof(acpi_fadt_t)); |
| 41 | memcpy(header->signature, "FACP", 4); |
| 42 | header->length = 244; |
| 43 | header->revision = 1; |
Stefan Reinauer | 03f82bd | 2011-09-20 22:36:32 +0200 | [diff] [blame] | 44 | memcpy(header->oem_id, OEM_ID, 6); |
| 45 | memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); |
| 46 | memcpy(header->asl_compiler_id, ASLC, 4); |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 47 | header->asl_compiler_revision = 42; |
| 48 | |
| 49 | fadt->firmware_ctrl = (u32)facs; |
| 50 | fadt->dsdt = (u32)dsdt; |
| 51 | fadt->preferred_pm_profile = 0; /* unspecified */ |
| 52 | fadt->sci_int = 9; |
| 53 | fadt->smi_cmd = 0; /* smi command port */ |
| 54 | fadt->acpi_enable = 0; /* acpi enable smi command */ |
| 55 | fadt->acpi_disable = 0; /* acpi disable smi command */ |
| 56 | fadt->s4bios_req = 0x0; |
| 57 | fadt->pstate_cnt = 0x0; |
| 58 | |
| 59 | fadt->pm1a_evt_blk = DEFAULT_PMBASE; |
| 60 | fadt->pm1b_evt_blk = 0x0; |
| 61 | fadt->pm1a_cnt_blk = DEFAULT_PMBASE + PMCNTRL; |
| 62 | fadt->pm1b_cnt_blk = 0x0; |
| 63 | |
| 64 | fadt->pm2_cnt_blk = 0; |
| 65 | fadt->pm_tmr_blk = DEFAULT_PMBASE + PMTMR; |
| 66 | fadt->gpe0_blk = DEFAULT_PMBASE + GPSTS; |
| 67 | fadt->gpe1_blk = 0x0; |
| 68 | fadt->gpe1_base = 0; |
| 69 | fadt->gpe1_blk_len = 0; |
| 70 | |
| 71 | /* *_len define register width in bytes */ |
| 72 | fadt->pm1_evt_len = 4; |
| 73 | fadt->pm1_cnt_len = 2; |
| 74 | fadt->pm2_cnt_len = 0; /* not supported */ |
| 75 | fadt->pm_tmr_len = 4; |
| 76 | fadt->gpe0_blk_len = 4; |
| 77 | |
| 78 | fadt->cst_cnt = 0; /* smi command to indicate c state changed notification */ |
| 79 | fadt->p_lvl2_lat = 101; /* >100 means c2 not supported */ |
| 80 | fadt->p_lvl3_lat = 1001; /* >1000 means c3 not supported */ |
Elyes HAOUAS | 1bcd7fc | 2016-07-28 21:20:04 +0200 | [diff] [blame] | 81 | fadt->flush_size = 0; /* only needed if CPU wbinvd is broken */ |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 82 | fadt->flush_stride = 0; |
| 83 | fadt->duty_offset = 1; /* bit 1:3 in PCNTRL reg (pmbase+0x10) */ |
| 84 | fadt->duty_width = 3; /* this width is in bits */ |
Elyes HAOUAS | 1bcd7fc | 2016-07-28 21:20:04 +0200 | [diff] [blame] | 85 | fadt->day_alrm = 0x0d; /* rtc cmos RAM offset */ |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 86 | fadt->mon_alrm = 0x0; /* not supported */ |
| 87 | fadt->century = 0x0; /* not supported */ |
| 88 | /* |
| 89 | * bit meaning |
| 90 | * 0 1: We have user-visible legacy devices |
| 91 | * 1 1: 8042 |
| 92 | * 2 0: VGA is ok to probe |
| 93 | * 3 1: MSI are not supported |
| 94 | */ |
| 95 | fadt->iapc_boot_arch = 0xb; |
| 96 | /* |
| 97 | * bit meaning |
| 98 | * 0 WBINVD |
| 99 | * Processors in new ACPI-compatible systems are required to |
| 100 | * support this function and indicate this to OSPM by setting |
| 101 | * this field. |
| 102 | * 1 WBINVD_FLUSH |
| 103 | * If set, indicates that the hardware flushes all caches on the |
| 104 | * WBINVD instruction and maintains memory coherency, but does |
| 105 | * not guarantee the caches are invalidated. |
| 106 | * 2 PROC_C1 |
| 107 | * C1 power state (x86 hlt instruction) is supported on all cpus |
| 108 | * 3 P_LVL2_UP |
| 109 | * 0: C2 only on uniprocessor, 1: C2 on uni- and multiprocessor |
| 110 | * 4 PWR_BUTTON |
| 111 | * 0: pwr button is fixed feature |
| 112 | * 1: pwr button has control method device if present |
| 113 | * 5 SLP_BUTTON |
| 114 | * 0: sleep button is fixed feature |
| 115 | * 1: sleep button has control method device if present |
| 116 | * 6 FIX_RTC |
| 117 | * 0: RTC wake status supported in fixed register spce |
| 118 | * 7 RTC_S4 |
| 119 | * 1: RTC can wake from S4 |
| 120 | * 8 TMR_VAL_EXT |
| 121 | * 1: pmtimer is 32bit, 0: pmtimer is 24bit |
| 122 | * 9 DCK_CAP |
| 123 | * 1: system supports docking station |
| 124 | * 10 RESET_REG_SUPPORT |
| 125 | * 1: fadt describes reset register for system reset |
| 126 | * 11 SEALED_CASE |
| 127 | * 1: No expansion possible, sealed case |
| 128 | * 12 HEADLESS |
| 129 | * 1: Video output, keyboard and mouse are not connected |
| 130 | * 13 CPU_SW_SLP |
| 131 | * 1: Special processor instruction needs to be executed |
| 132 | * after writing SLP_TYP |
| 133 | * 14 PCI_EXP_WAK |
| 134 | * 1: PM1 regs support PCIEXP_WAKE_(STS|EN), must be set |
| 135 | * on platforms with pci express support |
| 136 | * 15 USE_PLATFORM_CLOCK |
| 137 | * 1: OS should prefer platform clock over processor internal |
| 138 | * clock. |
| 139 | * 16 S4_RTC_STS_VALID |
| 140 | * 17 REMOTE_POWER_ON_CAPABLE |
| 141 | * 1: platform correctly supports OSPM leaving GPE wake events |
| 142 | * armed prior to an S5 transition. |
| 143 | * 18 FORCE_APIC_CLUSTER_MODEL |
| 144 | * 19 FORCE_APIC_PHYSICAL_DESTINATION_MODE |
| 145 | */ |
| 146 | fadt->flags = 0xa5; |
| 147 | |
| 148 | fadt->reset_reg.space_id = 0; |
| 149 | fadt->reset_reg.bit_width = 0; |
| 150 | fadt->reset_reg.bit_offset = 0; |
| 151 | fadt->reset_reg.resv = 0; |
| 152 | fadt->reset_reg.addrl = 0x0; |
| 153 | fadt->reset_reg.addrh = 0x0; |
| 154 | fadt->reset_value = 0; |
| 155 | |
| 156 | fadt->x_firmware_ctl_l = (u32)facs; |
| 157 | fadt->x_firmware_ctl_h = 0; |
| 158 | fadt->x_dsdt_l = (u32)dsdt; |
| 159 | fadt->x_dsdt_h = 0; |
| 160 | |
| 161 | fadt->x_pm1a_evt_blk.space_id = 1; |
| 162 | fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; |
| 163 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
| 164 | fadt->x_pm1a_evt_blk.resv = 0; |
| 165 | fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk; |
| 166 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 167 | |
| 168 | fadt->x_pm1b_evt_blk.space_id = 1; |
| 169 | fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8; |
| 170 | fadt->x_pm1b_evt_blk.bit_offset = 0; |
| 171 | fadt->x_pm1b_evt_blk.resv = 0; |
| 172 | fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk; |
| 173 | fadt->x_pm1b_evt_blk.addrh = 0x0; |
| 174 | |
| 175 | fadt->x_pm1a_cnt_blk.space_id = 1; |
| 176 | fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; |
| 177 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
| 178 | fadt->x_pm1a_cnt_blk.resv = 0; |
| 179 | fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; |
| 180 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 181 | |
| 182 | fadt->x_pm1b_cnt_blk.space_id = 1; |
| 183 | fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; |
| 184 | fadt->x_pm1b_cnt_blk.bit_offset = 0; |
| 185 | fadt->x_pm1b_cnt_blk.resv = 0; |
| 186 | fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk; |
| 187 | fadt->x_pm1b_cnt_blk.addrh = 0x0; |
| 188 | |
| 189 | fadt->x_pm2_cnt_blk.space_id = 1; |
| 190 | fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; |
| 191 | fadt->x_pm2_cnt_blk.bit_offset = 0; |
| 192 | fadt->x_pm2_cnt_blk.resv = 0; |
| 193 | fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk; |
| 194 | fadt->x_pm2_cnt_blk.addrh = 0x0; |
| 195 | |
| 196 | fadt->x_pm_tmr_blk.space_id = 1; |
| 197 | fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; |
| 198 | fadt->x_pm_tmr_blk.bit_offset = 0; |
| 199 | fadt->x_pm_tmr_blk.resv = 0; |
| 200 | fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; |
| 201 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 202 | |
| 203 | fadt->x_gpe0_blk.space_id = 1; |
| 204 | fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; |
| 205 | fadt->x_gpe0_blk.bit_offset = 0; |
| 206 | fadt->x_gpe0_blk.resv = 0; |
| 207 | fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; |
| 208 | fadt->x_gpe0_blk.addrh = 0x0; |
| 209 | |
| 210 | fadt->x_gpe1_blk.space_id = 1; |
Idwer Vollering | d26da9c | 2013-12-22 21:38:18 +0000 | [diff] [blame] | 211 | fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8; |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 212 | fadt->x_gpe1_blk.bit_offset = 0; |
| 213 | fadt->x_gpe1_blk.resv = 0; |
| 214 | fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; |
| 215 | fadt->x_gpe1_blk.addrh = 0x0; |
| 216 | |
| 217 | header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t)); |
| 218 | } |