cengjianeng | 9c1bf3c | 2023-12-18 16:15:03 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Weimin Wu | 0740d96 | 2024-01-31 20:43:42 +0800 | [diff] [blame^] | 3 | #include <baseboard/variants.h> |
| 4 | #include <chip.h> |
Jianeng Ceng | fdcbb25 | 2024-01-11 10:05:54 +0800 | [diff] [blame] | 5 | #include <fw_config.h> |
cengjianeng | 9c1bf3c | 2023-12-18 16:15:03 +0800 | [diff] [blame] | 6 | #include <sar.h> |
Weimin Wu | 0740d96 | 2024-01-31 20:43:42 +0800 | [diff] [blame^] | 7 | #include <soc/gpio_soc_defs.h> |
cengjianeng | 9c1bf3c | 2023-12-18 16:15:03 +0800 | [diff] [blame] | 8 | |
| 9 | const char *get_wifi_sar_cbfs_filename(void) |
| 10 | { |
Jianeng Ceng | fdcbb25 | 2024-01-11 10:05:54 +0800 | [diff] [blame] | 11 | return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI)); |
cengjianeng | 9c1bf3c | 2023-12-18 16:15:03 +0800 | [diff] [blame] | 12 | } |
Weimin Wu | 0740d96 | 2024-01-31 20:43:42 +0800 | [diff] [blame^] | 13 | |
| 14 | void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) |
| 15 | { |
| 16 | /* |
| 17 | * SOC Aux orientation override: |
| 18 | * This is a bitfield that corresponds to up to 4 TCSS ports. |
| 19 | * Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2. |
| 20 | * Bit0, Bit2 set to "0" indicates has retimer on TCSS Port. |
| 21 | * Bit0, Bit2 set to "1" indicates no retimer on TCSS Port. |
| 22 | * Bit1, Bit3 set to "0" indicates Aux lines are not swapped on TCSS Port. |
| 23 | * Bit1, Bit3 set to "1" indicates Aux lines are swapped on TCSS Port. |
| 24 | */ |
| 25 | |
| 26 | if (fw_config_probe(FW_CONFIG(DB_AUX_BIAS, SOC))) { |
| 27 | printk(BIOS_INFO, "DB DP AUX BIAS connect to SOC.\n"); |
| 28 | config->tcss_aux_ori = 5; |
| 29 | config->typec_aux_bias_pads[0].pad_auxp_dc = GPP_A19; |
| 30 | config->typec_aux_bias_pads[0].pad_auxn_dc = GPP_A20; |
| 31 | config->typec_aux_bias_pads[1].pad_auxp_dc = GPP_E22; |
| 32 | config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_E23; |
| 33 | } else { |
| 34 | printk(BIOS_INFO, "DB DP AUX BIAS connect to redriver IC.\n"); |
| 35 | config->tcss_aux_ori = 4; |
| 36 | config->typec_aux_bias_pads[1].pad_auxp_dc = GPP_E22; |
| 37 | config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_E23; |
| 38 | } |
| 39 | } |