blob: 4bbd4e3fa89262eb60c7fd2034cd3a330d091339 [file] [log] [blame]
Lee Leahyc4210412015-06-29 11:37:56 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2013 Google Inc.
6 * Copyright (C) 2015 Intel Corporation.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Lee Leahyc4210412015-06-29 11:37:56 -070016 */
17
Naresh G Solanki06b00982015-12-02 16:21:20 +053018#include <arch/acpi.h>
19#include <console/console.h>
Lee Leahyc4210412015-06-29 11:37:56 -070020#include <device/device.h>
Naresh G Solanki06b00982015-12-02 16:21:20 +053021#include <gpio.h>
pchandridfdd33e2015-08-24 13:44:19 -070022#include <stdlib.h>
Naresh G Solanki06b00982015-12-02 16:21:20 +053023#include <soc/nhlt.h>
pchandridfdd33e2015-08-24 13:44:19 -070024#include "ec.h"
Naresh G Solanki06b00982015-12-02 16:21:20 +053025#include "gpio.h"
pchandridfdd33e2015-08-24 13:44:19 -070026
27static void mainboard_init(device_t dev)
28{
29 mainboard_ec_init();
30}
31
Naresh G Solanki06b00982015-12-02 16:21:20 +053032static uint8_t select_audio_codec(void)
33{
34 int audio_db_sel = gpio_get(AUDIO_DB_ID);
35
36 return audio_db_sel;
37}
38
39static unsigned long mainboard_write_acpi_tables(
40 device_t device, unsigned long current, acpi_rsdp_t *rsdp)
41{
42 uintptr_t start_addr;
43 uintptr_t end_addr;
44 struct nhlt *nhlt;
45
46 start_addr = current;
47
48 nhlt = nhlt_init();
49
50 if (nhlt == NULL)
51 return start_addr;
52
53 /* 2 Channel DMIC array. */
54 if (nhlt_soc_add_dmic_array(nhlt, 2))
55 printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
56
57
58 /* 4 Channel DMIC array. */
59 if (nhlt_soc_add_dmic_array(nhlt, 4))
60 printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n");
61
62 if (select_audio_codec()) {
63 /* ADI Smart Amps for left and right. */
64 if (nhlt_soc_add_ssm4567(nhlt, AUDIO_LINK_SSP0))
65 printk(BIOS_ERR, "Couldn't add ssm4567.\n");
66 } else {
67 /* MAXIM Smart Amps for left and right. */
68 if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
69 printk(BIOS_ERR, "Couldn't add max98357.\n");
70 }
71
72 /* NAU88l25 Headset codec. */
73 if (nhlt_soc_add_nau88l25(nhlt, AUDIO_LINK_SSP1))
74 printk(BIOS_ERR, "Couldn't add headset codec.\n");
75
76 end_addr = nhlt_soc_serialize(nhlt, start_addr);
77
78 if (end_addr != start_addr)
79 acpi_add_table(rsdp, (void *)start_addr);
80
81 return end_addr;
82}
83
pchandridfdd33e2015-08-24 13:44:19 -070084/*
85 * mainboard_enable is executed as first thing after
86 * enumerate_buses().
87 */
88static void mainboard_enable(device_t dev)
89{
90 dev->ops->init = mainboard_init;
Naresh G Solanki06b00982015-12-02 16:21:20 +053091 dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
pchandridfdd33e2015-08-24 13:44:19 -070092}
Lee Leahyc4210412015-06-29 11:37:56 -070093
94struct chip_operations mainboard_ops = {
pchandridfdd33e2015-08-24 13:44:19 -070095 .enable_dev = mainboard_enable,
Lee Leahyc4210412015-06-29 11:37:56 -070096};