Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 1 | # Run an intermediate step when producing coreboot.rom |
| 2 | # that adds additional components to the final firmware |
| 3 | # image outside of CBFS |
| 4 | INTERMEDIATE += exynos5420_add_bl1 |
| 5 | |
| 6 | bootblock-y += spi.c |
| 7 | bootblock-y += pinmux.c mct.c power.c |
| 8 | # Clock is required for UART |
Gabe Black | fbb11cf | 2013-06-06 00:21:20 -0700 | [diff] [blame] | 9 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c |
| 10 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c |
| 11 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c |
Stefan Reinauer | 062c17b | 2013-06-19 15:51:04 -0700 | [diff] [blame^] | 12 | ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) |
Gabe Black | fbb11cf | 2013-06-06 00:21:20 -0700 | [diff] [blame] | 13 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c |
Stefan Reinauer | 062c17b | 2013-06-19 15:51:04 -0700 | [diff] [blame^] | 14 | endif |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 15 | bootblock-y += wakeup.c |
| 16 | bootblock-y += gpio.c |
Gabe Black | fbb11cf | 2013-06-06 00:21:20 -0700 | [diff] [blame] | 17 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pwm.c |
| 18 | bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += timer.c |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 19 | |
| 20 | romstage-y += spi.c |
| 21 | romstage-y += clock.c |
| 22 | romstage-y += clock_init.c |
| 23 | romstage-y += pinmux.c # required by s3c24x0_i2c and uart. |
| 24 | romstage-y += dmc_common.c |
| 25 | romstage-y += dmc_init_ddr3.c |
| 26 | romstage-y += power.c |
| 27 | romstage-y += mct.c |
| 28 | romstage-y += monotonic_timer.c |
Stefan Reinauer | 062c17b | 2013-06-19 15:51:04 -0700 | [diff] [blame^] | 29 | ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 30 | romstage-$(CONFIG_EARLY_CONSOLE) += uart.c |
Stefan Reinauer | 062c17b | 2013-06-19 15:51:04 -0700 | [diff] [blame^] | 31 | endif |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 32 | romstage-y += wakeup.c |
| 33 | romstage-y += pwm.c # needed by timer.c |
| 34 | romstage-y += gpio.c |
| 35 | romstage-y += timer.c |
| 36 | romstage-y += i2c.c |
| 37 | #romstage-y += wdt.c |
| 38 | |
| 39 | ramstage-y += spi.c |
| 40 | ramstage-y += clock.c |
| 41 | ramstage-y += clock_init.c |
| 42 | ramstage-y += pinmux.c |
| 43 | ramstage-y += power.c |
| 44 | ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c |
| 45 | ramstage-y += cpu.c |
| 46 | ramstage-y += tmu.c |
| 47 | ramstage-y += mct.c |
| 48 | ramstage-y += monotonic_timer.c |
| 49 | ramstage-y += pwm.c # needed by timer.c |
| 50 | ramstage-y += timer.c |
| 51 | ramstage-y += gpio.c |
| 52 | ramstage-y += i2c.c |
| 53 | ramstage-y += dp-reg.c |
| 54 | ramstage-y += fb.c |
| 55 | |
| 56 | exynos5420_add_bl1: $(obj)/coreboot.pre |
| 57 | printf " DD Adding Samsung Exynos5420 BL1\n" |
| 58 | dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \ |
| 59 | of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 |