blob: ca8c318e8a2f4a08ccb6736e54461428baf7a51f [file] [log] [blame]
Patrick Georgi04746fc2015-06-05 18:53:43 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 * Copyright 2014 Google Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc.
19 */
20
21#include <arch/io.h>
22#include <console/console.h>
23#include <cpu/x86/smm.h>
24#include <soc/pm.h>
25#include <soc/smm.h>
26#include <elog.h>
27#include <ec/google/chromeec/ec.h>
28#include <soc/gpio.h>
29#include <soc/iomap.h>
30#include <soc/nvs.h>
31#include <soc/pm.h>
32#include <soc/smm.h>
33
34int mainboard_io_trap_handler(int smif)
35{
36 switch (smif) {
37 case 0x99:
38 printk(BIOS_DEBUG, "Sample\n");
39 smm_get_gnvs()->smif = 0;
40 break;
41 default:
42 return 0;
43 }
44
45 /* On success, the IO Trap Handler returns 0
46 * On failure, the IO Trap Handler returns a value != 0
47 *
48 * For now, we force the return value to 0 and log all traps to
49 * see what's going on.
50 */
51 return 1;
52}
53
54/* gpi_sts is GPIO 47:32 */
55void mainboard_smi_gpi(u32 gpi_sts)
56{
57}
58
59void mainboard_smi_sleep(u8 slp_typ)
60{
61 /* Disable USB charging if required */
62 switch (slp_typ) {
63 case 3:
64 break;
65 case 5:
66 break;
67 }
68}
69
70int mainboard_smi_apmc(u8 apmc)
71{
72 switch (apmc) {
73 case APM_CNT_ACPI_ENABLE:
74 break;
75 case APM_CNT_ACPI_DISABLE:
76 break;
77 }
78 return 0;
79}