| Angel Pons | 230e4f9d | 2020-04-05 15:47:14 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Lee Leahy | 2ed7eb7 | 2016-01-01 18:08:48 -0800 | [diff] [blame] | 2 | |
| Kyösti Mälkki | 81100bf | 2019-08-16 10:37:15 +0300 | [diff] [blame] | 3 | #include <arch/romstage.h> |
| Lee Leahy | 2ed7eb7 | 2016-01-01 18:08:48 -0800 | [diff] [blame] | 4 | #include <cbmem.h> |
| Elyes HAOUAS | 58d3fce | 2020-05-27 18:29:07 +0200 | [diff] [blame] | 5 | #include <cpu/x86/mtrr.h> |
| Lee Leahy | f626b93 | 2016-07-10 14:13:19 -0700 | [diff] [blame] | 6 | #include <soc/reg_access.h> |
| Lee Leahy | 9fd0895 | 2016-02-02 07:17:06 -0800 | [diff] [blame] | 7 | |
| Kyösti Mälkki | 81100bf | 2019-08-16 10:37:15 +0300 | [diff] [blame] | 8 | void fill_postcar_frame(struct postcar_frame *pcf) |
| 9 | { |
| 10 | uintptr_t top_of_ram; |
| 11 | uintptr_t top_of_low_usable_memory; |
| 12 | |
| 13 | /* Locate the top of RAM */ |
| Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 14 | top_of_low_usable_memory = (uintptr_t)cbmem_top(); |
| Elyes Haouas | d6b6b22 | 2022-10-10 12:34:21 +0200 | [diff] [blame] | 15 | top_of_ram = ALIGN_UP(top_of_low_usable_memory, 16 * MiB); |
| Kyösti Mälkki | 81100bf | 2019-08-16 10:37:15 +0300 | [diff] [blame] | 16 | |
| 17 | /* Cache postcar and ramstage */ |
| 18 | postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB, |
| 19 | MTRR_TYPE_WRBACK); |
| 20 | |
| 21 | /* Cache RMU area */ |
| Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 22 | postcar_frame_add_mtrr(pcf, (uintptr_t)top_of_low_usable_memory, |
| Kyösti Mälkki | 81100bf | 2019-08-16 10:37:15 +0300 | [diff] [blame] | 23 | 0x10000, MTRR_TYPE_WRTHROUGH); |
| 24 | |
| 25 | /* Cache ESRAM */ |
| 26 | postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK); |
| 27 | |
| 28 | pcf->skip_common_mtrr = 1; |
| 29 | /* Cache SPI flash - Write protect not supported */ |
| 30 | postcar_frame_add_romcache(pcf, MTRR_TYPE_WRTHROUGH); |
| 31 | } |