Angel Pons | 2de6bdf | 2020-04-05 13:21:00 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <cpu/x86/smm.h> |
| 7 | #include "ec.h" |
| 8 | #include <ec/google/chromeec/ec.h> |
Kyösti Mälkki | 923b8ec | 2022-11-29 07:36:44 +0200 | [diff] [blame] | 9 | #include <ec/google/chromeec/smm.h> |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 10 | #include <soc/pm.h> |
| 11 | #include <soc/gpio.h> |
| 12 | |
Matt DeVillier | e69a9c7 | 2017-08-20 14:48:57 -0500 | [diff] [blame] | 13 | #include <variant/onboard.h> |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 14 | |
| 15 | /* The wake gpio is SUS_GPIO[0]. */ |
| 16 | #define WAKE_GPIO_EN SUS_GPIO_EN0 |
Hannah Williams | 73600e3 | 2015-07-27 19:46:34 -0700 | [diff] [blame] | 17 | #define GPIO_SUS7_WAKE_MASK (1 << 12) |
| 18 | #define GPIO_SUS1_WAKE_MASK (1 << 13) |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 19 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 20 | /* |
| 21 | * The entire 32-bit ALT_GPIO_SMI register is passed as a parameter. Note, that |
| 22 | * this includes the enable bits in the lower 16 bits. |
| 23 | */ |
| 24 | void mainboard_smi_gpi(uint32_t alt_gpio_smi) |
| 25 | { |
Kyösti Mälkki | 83faa5d | 2023-01-05 15:39:16 +0200 | [diff] [blame] | 26 | if (alt_gpio_smi & (1 << EC_SMI_GPI)) |
| 27 | chromeec_smi_process_events(); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 28 | } |
| 29 | |
| 30 | void mainboard_smi_sleep(uint8_t slp_typ) |
| 31 | { |
Hannah Williams | 73600e3 | 2015-07-27 19:46:34 -0700 | [diff] [blame] | 32 | void *addr; |
| 33 | uint32_t mask; |
| 34 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 35 | /* Disable USB charging if required */ |
Kyösti Mälkki | 027f86e | 2022-12-02 15:30:10 +0200 | [diff] [blame^] | 36 | chromeec_set_usb_charge_mode(slp_typ); |
| 37 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 38 | switch (slp_typ) { |
Aaron Durbin | 30b0c7a | 2016-07-13 13:01:13 -0500 | [diff] [blame] | 39 | case ACPI_S3: |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 40 | /* Enable wake events */ |
| 41 | google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 42 | /* Enable wake pin in GPE block. */ |
| 43 | enable_gpe(WAKE_GPIO_EN); |
| 44 | break; |
Aaron Durbin | 30b0c7a | 2016-07-13 13:01:13 -0500 | [diff] [blame] | 45 | case ACPI_S5: |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 46 | /* Enable wake events */ |
| 47 | google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); |
Hannah Williams | 73600e3 | 2015-07-27 19:46:34 -0700 | [diff] [blame] | 48 | |
| 49 | /* Disabling wake from SUS_GPIO1 (TOUCH INT) and |
| 50 | * SUS_GPIO7 (TRACKPAD INT) in North bank as they are not |
| 51 | * valid S5 wake sources |
| 52 | */ |
| 53 | addr = (void *)(IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPNORTH + |
| 54 | GPIO_WAKE_MASK_REG0); |
| 55 | mask = ~(GPIO_SUS1_WAKE_MASK | GPIO_SUS7_WAKE_MASK); |
| 56 | write32(addr, read32(addr) & mask); |
| 57 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 58 | break; |
| 59 | } |
| 60 | |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 61 | /* Disable SCI and SMI events */ |
| 62 | google_chromeec_set_smi_mask(0); |
| 63 | google_chromeec_set_sci_mask(0); |
| 64 | |
| 65 | /* Clear pending events that may trigger immediate wake */ |
Rob Barnes | f1ade48 | 2021-06-14 10:22:21 -0600 | [diff] [blame] | 66 | while (google_chromeec_get_event() != EC_HOST_EVENT_NONE) |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 67 | ; |
Matt DeVillier | 4f20a4a | 2017-08-20 17:56:48 -0500 | [diff] [blame] | 68 | |
| 69 | /* Set LPC lines to low power in S3/S5. */ |
| 70 | if ((slp_typ == ACPI_S3) || (slp_typ == ACPI_S5)) { |
| 71 | lpc_set_low_power(); |
| 72 | } |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | int mainboard_smi_apmc(uint8_t apmc) |
| 76 | { |
Kyösti Mälkki | 923b8ec | 2022-11-29 07:36:44 +0200 | [diff] [blame] | 77 | chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); |
Lee Leahy | 89b5fbd | 2015-05-11 17:24:31 -0700 | [diff] [blame] | 78 | return 0; |
| 79 | } |