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Angel Ponsf4702c22020-04-03 01:22:49 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01002
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01003#include <console/console.h>
4#include <cpu/x86/smm.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +02005#include <device/pci_ops.h>
Kyösti Mälkki661ad462020-12-29 06:26:21 +02006#include <soc/nvs.h>
Arthur Heymans548f33a2018-05-15 16:34:50 +02007#include <southbridge/intel/common/pmutil.h>
Angel Pons95de2312020-02-17 13:08:53 +01008#include <northbridge/intel/ironlake/ironlake.h>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01009#include <ec/acpi/ec.h>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010010
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010011void mainboard_smi_gpi(u32 gpi_sts)
12{
13}
14
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010015int mainboard_smi_apmc(u8 data)
16{
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010017 u8 tmp;
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010018 switch (data) {
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010019 case APM_CNT_ACPI_ENABLE:
20 tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
21 tmp &= ~0x03;
22 tmp |= 0x02;
23 pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
24 break;
25 case APM_CNT_ACPI_DISABLE:
26 tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
27 tmp &= ~0x03;
28 tmp |= 0x01;
29 pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
30 break;
31 default:
32 break;
33 }
34 return 0;
35}