blob: 2514efde68c3be6763c7c3ace37e239e07aba40e [file] [log] [blame]
Stanley Wuc56df922023-07-12 19:44:53 +08001fw_config
2 field AUDIO_CODEC_SOURCE 41 43
3 option AUDIO_CODEC_ALC5682I_VS 0
4 option AUDIO_CODEC_ALC5682_VD 1
5 end
6end
7
8
kevin3.yang67528fb2023-04-19 14:31:00 +08009chip soc/intel/jasperlake
10
11 # Intel Common SoC Config
12 #+-------------------+---------------------------+
13 #| Field | Value |
14 #+-------------------+---------------------------+
15 #| GSPI0 | cr50 TPM. Early init is |
16 #| | required to set up a BAR |
17 #| | for TPM communication |
18 #| | before memory is up |
kevin3.yang67528fb2023-04-19 14:31:00 +080019 #| I2C4 | Audio |
20 #+-------------------+---------------------------+
21 register "common_soc_config" = "{
22 .gspi[0] = {
23 .speed_mhz = 1,
24 .early_init = 1,
25 },
kevin3.yang67528fb2023-04-19 14:31:00 +080026 .i2c[4] = {
Kevin Yang739f9352023-04-21 13:50:52 +080027 .speed_config[0] = {
28 .speed = I2C_SPEED_FAST,
29 .scl_lcnt = 190,
30 .scl_hcnt = 100,
31 .sda_hold = 40,
32 }
kevin3.yang67528fb2023-04-19 14:31:00 +080033 },
34 }"
35
Stanley Wu4c68d842023-08-01 11:41:37 +080036 # Power limit config
37 register "power_limits_config[JSL_N4500_6W_CORE]" = "{
38 .tdp_pl1_override = 6,
39 .tdp_pl2_override = 20,
40 .tdp_pl4 = 60,
41 }"
42
43 register "power_limits_config[JSL_N5100_6W_CORE]" = "{
44 .tdp_pl1_override = 6,
45 .tdp_pl2_override = 20,
46 .tdp_pl4 = 60,
47 }"
48
Kevin Yang739f9352023-04-21 13:50:52 +080049 # Enable Root Port 3 (index 2) for LAN
50 # External PCIe port 7 is mapped to PCIe Root Port 3
51 register "PcieRpEnable[2]" = "1"
52 register "PcieClkSrcUsage[4]" = "2"
53
54 # Enable Root Port 7 (index 6) for WLAN
55 # External PCIe port 3 is mapped to PCIe Root Port 7
56 register "PcieRpEnable[6]" = "1"
57 register "PcieClkSrcUsage[3]" = "6"
58
59 # Disable PCIe Root Port 8
60 register "PcieRpEnable[7]" = "0"
61
62 # Audio related configurations
63 register "PchHdaAudioLinkDmicEnable[0]" = "0"
64 register "PchHdaAudioLinkDmicEnable[1]" = "0"
65
66 # Disable SD card
67 register "sdcard_cd_gpio" = "0"
68 register "SdCardPowerEnableActiveHigh" = "0"
69
70 # Disable eDP on port A
71 register "DdiPortAConfig" = "0"
72
73 # Enable HPD and DDC for DDI port A
74 register "DdiPortAHpd" = "1"
75 register "DdiPortADdc" = "1"
76
Kevin Yang9366f6f2023-05-03 08:38:39 +080077 # Does not support external vnn power rail
78 register "disable_external_bypass_vr" = "1"
79
Kevin Yang739f9352023-04-21 13:50:52 +080080 # USB Port Configuration
81 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
82 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1
83 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port C1
84
kevin3.yang67528fb2023-04-19 14:31:00 +080085 device domain 0 on
Kevin Yang739f9352023-04-21 13:50:52 +080086 device pci 04.0 on
87 chip drivers/intel/dptf
88 ## Passive Policy
89 register "policies.passive" = "{
Stanley Wu456e5002023-08-09 18:13:12 +080090 [0] = DPTF_PASSIVE(CPU, CPU, 95, 10000),
91 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 60000),
92 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 60000),
93 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 90, 15000)
Kevin Yang739f9352023-04-21 13:50:52 +080094 }"
95
96 ## Critical Policy
97 register "policies.critical" = "{
98 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
Stanley Wu456e5002023-08-09 18:13:12 +080099 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
100 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
101 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN)
Kevin Yang739f9352023-04-21 13:50:52 +0800102 }"
103
104 register "controls.power_limits" = "{
105 .pl1 = {
106 .min_power = 3000,
107 .max_power = 6000,
108 .time_window_min = 1 * MSECS_PER_SEC,
109 .time_window_max = 1 * MSECS_PER_SEC,
110 .granularity = 100,
111 },
112 .pl2 = {
113 .min_power = 20000,
114 .max_power = 20000,
115 .time_window_min = 1 * MSECS_PER_SEC,
116 .time_window_max = 1 * MSECS_PER_SEC,
117 .granularity = 1000,
118 }
119 }"
120
121 register "options.tsr[0].desc" = ""Memory""
122 register "options.tsr[1].desc" = ""Power""
123 register "options.tsr[2].desc" = ""Chassis""
124
125 ## Charger Performance Control (Control, mA)
126 register "controls.charger_perf" = "{
127 [0] = { 255, 3000 },
128 [1] = { 24, 1500 },
129 [2] = { 16, 1000 },
130 [3] = { 8, 500 }
131 }"
132
133 device generic 0 on end
134 end
135 end # SA Thermal device
136 device pci 14.0 on
137 chip drivers/usb/acpi
138 # TODO (b/264960828) verify PLD values
139 device usb 0.0 on
140 chip drivers/usb/acpi
141 register "desc" = ""USB2 Type-C Port C0""
142 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
143 register "group" = "ACPI_PLD_GROUP(1, 1)"
144 device usb 2.0 on end
145 end
146 chip drivers/usb/acpi
147 register "desc" = ""USB2 Type-A Port A0""
148 register "type" = "UPC_TYPE_A"
149 register "group" = "ACPI_PLD_GROUP(1, 2)"
150 device usb 2.1 on end
151 end
152 chip drivers/usb/acpi
153 register "desc" = ""USB2 Type-A Port A1""
154 register "type" = "UPC_TYPE_A"
155 register "group" = "ACPI_PLD_GROUP(1, 3)"
156 device usb 2.2 on end
157 end
158 chip drivers/usb/acpi
159 register "desc" = ""USB2 Type-C Port C1""
160 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
161 register "group" = "ACPI_PLD_GROUP(1, 4)"
162 device usb 2.3 on end
163 end
164 chip drivers/usb/acpi
165 register "desc" = ""USB3 Type-C Port C0""
166 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
167 register "group" = "ACPI_PLD_GROUP(1, 1)"
168 device usb 3.0 on end
169 end
170 chip drivers/usb/acpi
171 register "desc" = ""USB3 Type-C Port C1""
172 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
173 register "group" = "ACPI_PLD_GROUP(1, 2)"
174 device usb 3.1 off end
175 end
176 chip drivers/usb/acpi
177 register "desc" = ""USB3 Type-A Port A0""
178 register "type" = "UPC_TYPE_USB3_A"
179 register "group" = "ACPI_PLD_GROUP(1, 3)"
180 device usb 3.2 on end
181 end
182 chip drivers/usb/acpi
183 register "desc" = ""USB3 Type-A Port A1""
184 register "type" = "UPC_TYPE_USB3_A"
185 register "group" = "ACPI_PLD_GROUP(1, 4)"
186 device usb 3.3 on end
187 end
188 end
189 end
190 end # USB xHCI
191 device pci 15.0 off end # I2C 0
192 device pci 15.1 off end # I2C 1
193 device pci 15.2 off end # I2C 2
194 device pci 15.3 off end # I2C 3
195 device pci 19.0 on
196 chip drivers/i2c/generic
Kevin Yangcacdb852023-06-13 15:11:10 +0800197 register "hid" = ""10EC5682""
Kevin Yang739f9352023-04-21 13:50:52 +0800198 register "name" = ""RT58""
199 register "desc" = ""Realtek RT5682""
200 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
201 register "property_count" = "1"
202 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
203 register "property_list[0].name" = ""realtek,jd-src""
204 register "property_list[0].integer" = "1"
Stanley Wuc56df922023-07-12 19:44:53 +0800205 device i2c 1a on
206 probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682_VD
207 end
208 end
209 chip drivers/i2c/generic
210 register "hid" = ""RTL5682""
211 register "name" = ""RT58""
212 register "desc" = ""Realtek RT5682""
213 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
214 register "property_count" = "1"
215 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
216 register "property_list[0].name" = ""realtek,jd-src""
217 register "property_list[0].integer" = "1"
218 device i2c 1a on
219 probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS
220 end
Kevin Yang739f9352023-04-21 13:50:52 +0800221 end
222 end # I2C 4
223 device pci 1c.2 on
224 chip drivers/net
Stanley Wu00e92f42023-08-23 15:21:07 +0800225 register "customized_leds" = "0x07af"
Kevin Yang739f9352023-04-21 13:50:52 +0800226 register "wake" = "GPE0_DW0_03" # GPP_B3
227 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
228 register "device_index" = "0"
229 device pci 00.0 on end
230 end
231 end # PCI Express Root Port 3 - RTL8111H LAN
232 device pci 1c.6 on
233 chip drivers/wifi/generic
234 register "wake" = "GPE0_DW2_03"
235 device pci 00.0 on end
236 end
237 end # PCI Express Root Port 7 - WLAN
238 device pci 1c.7 off end # PCI Express Root Port 8
239 device pci 1f.3 on end # Intel HDA
kevin3.yang67528fb2023-04-19 14:31:00 +0800240 end
241end