| /* |
| * This file is part of the coreboot project. |
| * |
| * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include <northbridge/intel/sandybridge/sandybridge.h> |
| #include <southbridge/intel/bd82x6x/pch.h> |
| |
| void mainboard_rcba_config(void) |
| { |
| u32 reg32; |
| |
| /* Disable unused devices (board specific) */ |
| reg32 = RCBA32(FD); |
| /* Disable PCI bridge so MRC does not probe this bus */ |
| reg32 |= PCH_DISABLE_P2P; |
| RCBA32(FD) = reg32; |
| } |
| |
| void mainboard_early_init(int s3resume) |
| { |
| } |
| |
| int mainboard_should_reset_usb(int s3resume) |
| { |
| return !s3resume; |
| } |