commit feed329a0c006968242aa3065506b5f37f4308d4
author Kerry She <shekairui@gmail.com> Thu Aug 18 18:03:44 2011 +0800
committer Stefan Reinauer <stefan.reinauer@coreboot.org> Wed Sep 07 01:08:57 2011 +0200
tree 0ef0e9e0c112230dd03fe14e199b0be74776b112
parent 16d3ec6a58b7a7ba52d4d17299b977e5c3e0557f

AMD F14 southbridge update

This change adds the southbridge related code to support
the update of the AMD Family14 cpus to the rec C0 level.
Some of the changes reside in mainboard folders but they
reference changed files in the southbridge folder so they
are included herein.

Change-Id: Ib7786f9f697eaf0bf8abd9140c4dd0c42927ec7e
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Signed-off-by: Kerry She <kerry.she@amd.com>
Signed-off-by: Kerry She <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/135
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/vendorcode/amd/cimx/sb800/OEM.h

diff --git a/src/vendorcode/amd/cimx/sb800/OEM.h b/src/vendorcode/amd/cimx/sb800/OEM.h
index 6ca4271..9abea30 100644
--- a/src/vendorcode/amd/cimx/sb800/OEM.h
+++ b/src/vendorcode/amd/cimx/sb800/OEM.h
@@ -30,7 +30,9 @@
  *
  */
 
-#define BIOS_SIZE                      0x04   //04 - 1MB
+#ifndef BIOS_SIZE
+  #define BIOS_SIZE                      0x04   //04 - 1MB
+#endif
 #define LEGACY_FREE                    0x00
 //#define ACPI_SLEEP_TRAP                0x01
 //#define SPREAD_SPECTRUM_EPROM_LOAD     0x01