| chip soc/intel/broadwell | |
| # Set panel power delays | |
| register "gpu_panel_power_cycle_delay" = "5" # 400ms | |
| register "gpu_panel_power_up_delay" = "400" # 40ms | |
| register "gpu_panel_power_down_delay" = "150" # 15ms | |
| register "gpu_panel_power_backlight_on_delay" = "70" # 7ms | |
| register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms | |
| # DTLE DATA / EDGE values | |
| register "sata_port0_gen3_dtle" = "0x5" | |
| register "sata_port1_gen3_dtle" = "0x5" | |
| device domain 0 on end | |
| end |