| /* |
| * This file is part of the coreboot project. |
| * |
| * Copyright (C) 2015-2016 Intel Corp. |
| * Copyright (C) 2017 Advanced Micro Devices, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include <cpu/x86/mp.h> |
| #include <cpu/x86/mtrr.h> |
| #include <device/device.h> |
| #include <soc/pci_devs.h> |
| #include <soc/cpu.h> |
| #include <soc/northbridge.h> |
| #include <console/console.h> |
| |
| /* |
| * Do essential initialization tasks before APs can be fired up - |
| * |
| * 1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This |
| * creates the MTRR solution that the APs will use. Otherwise APs will try to |
| * apply the incomplete solution as the BSP is calculating it. |
| */ |
| static void pre_mp_init(void) |
| { |
| x86_setup_mtrrs_with_detect(); |
| x86_mtrr_check(); |
| } |
| |
| static int get_cpu_count(void) |
| { |
| device_t nb = dev_find_slot(0, HT_DEVFN); |
| return (pci_read_config16(nb, D18F0_CPU_CNT) & CPU_CNT_MASK) + 1; |
| } |
| |
| static const struct mp_ops mp_ops = { |
| .pre_mp_init = pre_mp_init, |
| .get_cpu_count = get_cpu_count, |
| }; |
| |
| void stoney_init_cpus(struct device *dev) |
| { |
| /* Clear for take-off */ |
| if (mp_init_with_smm(dev->link_list, &mp_ops) < 0) |
| printk(BIOS_ERR, "MP initialization failure.\n"); |
| } |